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insts
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Add in support for condition code flags.
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2007-07-17 15:33:18 -07:00 |
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isa
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Make "test" set some condition codes.
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2007-07-17 15:35:34 -07:00 |
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linux
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Get X86 to load an elf and start a process for it.
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2007-03-06 15:42:30 +00:00 |
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arguments.hh
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Add build hooks for x86.
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2007-03-03 16:01:48 +00:00 |
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emulenv.cc
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Forgot to check these in...
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2007-06-20 19:04:39 +00:00 |
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emulenv.hh
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Forgot to check these in...
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2007-06-20 19:04:39 +00:00 |
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faults.hh
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Fix up the base x86 fault object and create a fault to be generated by unimplemented instructions in their microcode. This is useful if certain variations of an instruction are implemented, but, for instance, it's memory based versions aren't.
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2007-04-10 17:13:26 +00:00 |
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floatregfile.cc
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Add some new source files.
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2007-03-05 17:56:26 +00:00 |
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floatregfile.hh
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Reorganize the floating point register file a little.
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2007-03-05 17:57:26 +00:00 |
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interrupts.hh
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Add build hooks for x86.
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2007-03-03 16:01:48 +00:00 |
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intregfile.cc
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Add some dprintfs
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2007-06-12 16:22:35 +00:00 |
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intregfile.hh
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Add a spot for the condition code portion of the flag register.
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2007-07-17 13:26:06 -07:00 |
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intregs.hh
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Move bitunion code into it's own file.
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2007-07-14 17:28:26 -07:00 |
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isa_traits.hh
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Get rid of the immediate and displacement components of the EmulEnv struct and use them directly out of the instruction. The extra copies are conceptually realistic but are just innefficient as implemented. Also don't use the zeroeth microcode register for general storage since it's now the zero register, and implement a load and a store microops.
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2007-06-19 14:18:25 +00:00 |
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kernel_stats.hh
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Add build hooks for x86.
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2007-03-03 16:01:48 +00:00 |
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locked_mem.hh
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Stub implementation for x86
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2007-03-05 16:08:18 +00:00 |
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miscregfile.cc
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Merge zizzer:/bk/newmem
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2007-03-07 15:04:44 -05:00 |
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miscregfile.hh
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*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
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2007-03-07 15:04:31 -05:00 |
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miscregs.hh
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Create a file to describe misc registers.
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2007-07-17 13:29:40 -07:00 |
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mmaped_ipr.hh
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Stub implementation for x86.
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2007-03-05 16:09:09 +00:00 |
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pagetable.hh
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Add some new source files.
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2007-03-05 17:56:26 +00:00 |
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predecoder.cc
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Fix a newly introduced bug where the predecoder wasn't picking up all the displacement.
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2007-06-20 19:06:08 +00:00 |
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predecoder.hh
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Make branches work by repopulating the predecoder every time through. This is probably fine as far as the predecoder goes, but the simple cpu might want to not refetch something it already has. That reintroduces the self modifying code problem though.
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2007-06-19 18:17:34 +00:00 |
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predecoder_tables.cc
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x86 work that hadn't been checked in.
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2007-05-31 13:50:35 +00:00 |
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process.cc
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X86 probably doesn't need a window save area.
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2007-06-20 19:05:06 +00:00 |
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process.hh
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Get X86 to load an elf and start a process for it.
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2007-03-06 15:42:30 +00:00 |
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regfile.cc
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x86 work that hadn't been checked in.
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2007-05-31 13:50:35 +00:00 |
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regfile.hh
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*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
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2007-03-07 15:04:31 -05:00 |
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remote_gdb.cc
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Add some new source files.
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2007-03-05 17:56:26 +00:00 |
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remote_gdb.hh
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Add in NumGDBRegs so the constructor to the base class can get all it's arguments.
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2007-03-05 17:58:15 +00:00 |
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SConscript
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Pull some hard coded base classes out of the isa description.
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2007-07-14 17:14:19 -07:00 |
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SConsopts
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Rework the way SCons recurses into subdirectories, making it
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2007-03-10 23:00:54 -08:00 |
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segmentregs.hh
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Define symbols for the x86 specialization of the microassembler.
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2007-06-21 15:28:08 +00:00 |
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stacktrace.hh
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Filled in a stub header file for a stacktrace object. I'm still not sure what this is for, and it probably doesn't work on anything but Alpha.
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2007-03-05 14:52:28 +00:00 |
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syscallreturn.hh
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Filled in a stub header file for setting the result of a syscall.
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2007-03-05 14:53:15 +00:00 |
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tlb.hh
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Add build hooks for x86.
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2007-03-03 16:01:48 +00:00 |
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types.hh
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Move bitunion code into it's own file.
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2007-07-14 17:28:26 -07:00 |
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utility.hh
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Get rid of the immediate and displacement components of the EmulEnv struct and use them directly out of the instruction. The extra copies are conceptually realistic but are just innefficient as implemented. Also don't use the zeroeth microcode register for general storage since it's now the zero register, and implement a load and a store microops.
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2007-06-19 14:18:25 +00:00 |
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vtophys.hh
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Fill out a stub version of the vtophys header file.
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2007-03-05 17:59:04 +00:00 |
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x86_traits.hh
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Add a spot for the condition code portion of the flag register.
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2007-07-17 13:26:06 -07:00 |
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