gem5/src/mem/ruby/system
Andreas Hansson c2d2ea99e3 MEM: Split SimpleTimingPort into PacketQueue and ports
This patch decouples the queueing and the port interactions to
simplify the introduction of the master and slave ports. By separating
the queueing functionality from the port itself, it becomes much
easier to distinguish between master and slave ports, and still retain
the queueing ability for both (without code duplication).

As part of the split into a PacketQueue and a port, there is now also
a hierarchy of two port classes, QueuedPort and SimpleTimingPort. The
QueuedPort is useful for ports that want to leave the packet
transmission of outgoing packets to the queue and is used by both
master and slave ports. The SimpleTimingPort inherits from the
QueuedPort and adds the implemention of recvTiming and recvFunctional
through recvAtomic.

The PioPort and MessagePort are cleaned up as part of the changes.

--HG--
rename : src/mem/tport.cc => src/mem/packet_queue.cc
rename : src/mem/tport.hh => src/mem/packet_queue.hh
2012-03-22 06:36:27 -04:00
..
AbstractMemOrCache.hh ruby: use RubyMemory flag & remove setDebug() functionality 2011-05-05 02:20:31 -04:00
AbstractReplacementPolicy.hh Ruby: Shuffle some of the included files 2011-12-31 18:44:51 -06:00
Cache.py Ruby Cache: Add param for marking caches as instruction only 2012-01-07 07:38:53 -06:00
CacheMemory.cc Ruby: Remove isTagPresent() calls from Sequencer.cc 2012-02-10 11:29:02 -06:00
CacheMemory.hh Ruby: Add infrastructure for recording cache contents 2012-01-11 13:29:15 -06:00
DirectoryMemory.cc Ruby: Resurrect Cache Warmup Capability 2012-01-11 13:48:48 -06:00
DirectoryMemory.hh Ruby: Shuffle some of the included files 2011-12-31 18:44:51 -06:00
DirectoryMemory.py Ruby: Commit files missing from previous commit 2011-07-01 16:29:33 -05:00
DMASequencer.cc Ruby: Shuffle some of the included files 2011-12-31 18:44:51 -06:00
DMASequencer.hh Ruby: Resurrect Cache Warmup Capability 2012-01-11 13:48:48 -06:00
LRUPolicy.hh ruby: style pass 2010-03-22 18:43:53 -07:00
MachineID.hh Ruby: Remove some unused typedefs 2011-11-03 22:46:45 -05:00
MemoryControl.cc Ruby: Shuffle some of the included files 2011-12-31 18:44:51 -06:00
MemoryControl.hh Ruby: Shuffle some of the included files 2011-12-31 18:44:51 -06:00
MemoryControl.py ruby: Added copyright to many Ruby *.py files 2010-03-21 21:22:20 -07:00
MemoryNode.cc ruby: style pass 2010-03-22 18:43:53 -07:00
MemoryNode.hh ruby: style pass 2010-03-22 18:43:53 -07:00
MemoryVector.hh Ruby Memory Vector: Functions for collating and populating pages 2012-01-11 11:46:23 -06:00
PerfectCacheMemory.hh PerfectCacheMemory: Remove references to CacheMsg 2012-01-12 00:35:57 -06:00
PersistentTable.cc ruby: get rid of the Map class 2010-06-10 23:17:07 -07:00
PersistentTable.hh Ruby: Shuffle some of the included files 2011-12-31 18:44:51 -06:00
PseudoLRUPolicy.hh GCC: Get everything working with gcc 4.6.1. 2011-10-31 01:09:44 -07:00
RubyPort.cc MEM: Split SimpleTimingPort into PacketQueue and ports 2012-03-22 06:36:27 -04:00
RubyPort.hh MEM: Split SimpleTimingPort into PacketQueue and ports 2012-03-22 06:36:27 -04:00
RubyPortProxy.cc MEM: Add port proxies instead of non-structural ports 2012-01-17 12:55:08 -06:00
RubyPortProxy.hh MEM: Add port proxies instead of non-structural ports 2012-01-17 12:55:08 -06:00
RubySystem.py Ruby: Add support for functional accesses 2011-06-30 19:49:26 -05:00
SConscript MEM: Add port proxies instead of non-structural ports 2012-01-17 12:55:08 -06:00
Sequencer.cc Ruby: Remove isTagPresent() calls from Sequencer.cc 2012-02-10 11:29:02 -06:00
Sequencer.hh clang: Enable compiling gem5 using clang 2.9 and 3.0 2012-01-31 12:05:52 -05:00
Sequencer.py MEM: Introduce the master/slave port roles in the Python classes 2012-02-13 06:43:09 -05:00
SparseMemory.cc Ruby Sparse Memory: Add function for collating blocks 2012-01-11 13:29:54 -06:00
SparseMemory.hh Ruby Sparse Memory: Add function for collating blocks 2012-01-11 13:29:54 -06:00
System.cc Ruby: Resurrect Cache Warmup Capability 2012-01-11 13:48:48 -06:00
System.hh Ruby: Resurrect Cache Warmup Capability 2012-01-11 13:48:48 -06:00
TBETable.hh Change interface between coherence protocols and CacheMemory 2011-01-17 18:46:16 -06:00
TimerTable.cc ruby: get rid of the Map class 2010-06-10 23:17:07 -07:00
TimerTable.hh ruby: get rid of the Map class 2010-06-10 23:17:07 -07:00
WireBuffer.cc Ruby: Add new object called WireBuffer to mimic a Wire. 2011-03-31 17:17:57 -07:00
WireBuffer.hh includes: sort all includes 2011-04-15 10:44:06 -07:00
WireBuffer.py CacheMemory: add allocateVoid() that is == allocate() but no return value. 2011-03-31 18:20:12 -07:00