ce2722cdd9
If the cache access mode is parallel, i.e. "sequential_access" parameter is set to "False", tags and data are accessed in parallel. Therefore, the hit_latency is the maximum latency between tag_latency and data_latency. On the other hand, if the cache access mode is sequential, i.e. "sequential_access" parameter is set to "True", tags and data are accessed sequentially. Therefore, the hit_latency is the sum of tag_latency plus data_latency. Signed-off-by: Jason Lowe-Power <jason@lowepower.com> |
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.. | ||
__init__.py | ||
Benchmarks.py | ||
CacheConfig.py | ||
Caches.py | ||
cpu2000.py | ||
CpuConfig.py | ||
FSConfig.py | ||
GPUTLBConfig.py | ||
GPUTLBOptions.py | ||
HMC.py | ||
MemConfig.py | ||
O3_ARM_v7a.py | ||
Options.py | ||
PlatformConfig.py | ||
SimpleOpts.py | ||
Simulation.py | ||
SysPaths.py |