gem5/src
Gabe Black af6b1667e9 ARM: Implement a stub of CPACR.
This register controls access to the coprocessors. This doesn't actually
implement it, it allows writes which don't turn anything off. In other words,
it allows the simulated program to ask for what it already has.
2010-06-02 12:58:09 -05:00
..
arch ARM: Implement a stub of CPACR. 2010-06-02 12:58:09 -05:00
base ARM: Detect thumb mode elf images. 2010-06-02 12:58:00 -05:00
cpu ARM: Make the predecoder handle Thumb instructions. 2010-06-02 12:58:00 -05:00
dev ARM: Adjust some copyrights 2010-06-02 12:57:59 -05:00
doxygen Fix up doxygen. 2006-08-14 19:25:07 -04:00
kern macos: MacOS has deprecated getdirentries, so just disable the code. 2010-05-06 08:42:21 -07:00
mem style: clean up ruby's Set class 2010-06-01 11:38:56 -07:00
python slicc: have a central mechanism for creating a code_formatter. 2010-03-10 16:22:26 -08:00
sim ARM: Allow ARM processes to start in Thumb mode. 2010-06-02 12:58:00 -05:00
unittest includes: sort includes again 2009-05-17 14:34:52 -07:00
Doxyfile Fix up doxygen. 2006-08-14 19:25:07 -04:00
SConscript scons: don't maintain files in sorted order 2010-04-15 16:25:14 -07:00