Ali Saidi ecfd628ecd Modify ISA and staticInst to support a IsFirstMicroOp flag ... Increment instruction count on first micro-op instead of last src/arch/sparc/isa/decoder.isa: Implement a twin load for ASI_LDTX_P(0xe2) src/arch/sparc/isa/formats/mem/blockmem.isa: set the new flag IsFirstMicroOp when needed src/cpu/simple/atomic.cc: Increment instruction count on first micro-op instead of last (because if we take a fault on a micro coded instruction it should be counted twice acording to legion) src/cpu/static_inst.hh: Add IsFirstMicroop flag to static insts --HG-- extra : convert_revision : 02bea93d38c03bbafe4570665eb4c01c11caa2fc		2007-01-16 19:06:05 -05:00
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formats	Modify ISA and staticInst to support a IsFirstMicroOp flag	2007-01-16 19:06:05 -05:00
base.isa	Fixes to the isa description.	2006-11-23 00:36:42 -05:00
bitfields.isa	Fixed the bitfield FCN to include the right bits.	2006-10-25 17:50:39 -04:00
decoder.isa	Modify ISA and staticInst to support a IsFirstMicroOp flag	2007-01-16 19:06:05 -05:00
includes.isa	Fix up instructions to read and write control registers, and got rid of the control register fields which won't work on a big endian host.	2006-11-10 04:02:39 -05:00
main.isa	Broke Load/Store instructions into microcode, and partially refactored memory operations in the SPARC ISA description.	2006-10-23 07:55:52 -04:00
operands.isa	Support for twin loads.	2006-12-16 12:54:28 -05:00