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Andreas Hansson abc212461b MEM: Explicit ports and Python binding on CopyEngine 
The copy-engine ports were previously created implicitly and bound
based on the dma port peer rather than relying on the normal Python
binding (connectPorts) being called explicitly. This patch makes the
copy engine port similar to all other ports in that they are visibly
in the Python class and bound using the normal explicit calls through
Python.
2012-02-13 06:46:43 -05:00
build_opts SE/FS: Pull FULL_SYSTEM out of the build_opts files 2012-01-28 07:24:53 -08:00
configs MEM: Introduce the master/slave port roles in the Python classes 2012-02-13 06:43:09 -05:00
ext clang: Enable compiling gem5 using clang 2.9 and 3.0 2012-01-31 12:05:52 -05:00
src MEM: Explicit ports and Python binding on CopyEngine 2012-02-13 06:46:43 -05:00
system ARM: Boot loader changes that make it more flexible about load and I/O addrs 2011-05-04 20:38:27 -05:00
tests MEM: Introduce the master/slave port roles in the Python classes 2012-02-13 06:43:09 -05:00
util m5=>gem5: Make the regression script build gem5.* instead of m5.* 2012-02-07 04:43:05 -08:00
.hgignore .hgignore: added src/doxygen 2010-07-27 20:00:38 -07:00
.hgtags Added tag Calvin_Submission for changeset 5de565c4b7bd 2009-11-18 11:55:42 -06:00
COPYING copyright: Add code for finding all copyright blocks and create a COPYING file 2011-06-02 17:36:07 -07:00
LICENSE copyright: Add code for finding all copyright blocks and create a COPYING file 2011-06-02 17:36:07 -07:00
README Info: Clean up some info files. 2011-02-14 21:36:37 -08:00
SConstruct Merge with head, hopefully the last time for this batch. 2012-01-31 22:40:08 -08:00

README 

This is the M5 simulator.

For detailed information about building the simulator and getting
started please refer to http://www.m5sim.org.

Specific pages of interest are:
http://www.m5sim.org/wiki/index.php/Compiling_M5
http://www.m5sim.org/wiki/index.php/Running_M5

Short version:

1. If you don't have SCons version 0.98.1 or newer, get it from
http://wwww.scons.org.

2. If you don't have SWIG version 1.3.31 or newer, get it from
http://wwww.swig.org.

3. Make sure you also have gcc version 3.4.6 or newer, Python 2.4 or newer
(the dev version with header files), zlib, and the m4 preprocessor.

4. In this directory, type 'scons build/ALPHA_SE/tests/debug/quick'.  This
will build the debug version of the m5 binary (m5.debug) for the Alpha
syscall emulation target, and run the quick regression tests on it.

If you have questions, please send mail to m5-users@m5sim.org

WHAT'S INCLUDED (AND NOT)
-------------------------

The basic source release includes these subdirectories:
 - m5:
   - configs: simulation configuration scripts
   - ext: less-common external packages needed to build m5
   - src: source code of the m5 simulator
   - system: source for some optional system software for simulated systems
   - tests: regression tests
   - util: useful utility programs and files

To run full-system simulations, you will need compiled system firmware
(console and PALcode for Alpha), kernel binaries and one or more disk images. 
These files for Alpha are collected in a separate archive, m5_system.tar.bz2.
This file can he downloaded separately.

Depending on the ISA used, M5 may support Linux 2.4/2.6, FreeBSD, and the
proprietary Compaq/HP Tru64 version of Unix. We are able to distribute Linux
and FreeBSD bootdisks, but we are unable to distribute bootable disk images of
Tru64 Unix. If you have a Tru64 license and are interested in
obtaining disk images, contact us at m5-users@m5sim.org