.. |
insts
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revert 5af8f40d8f2c
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2015-07-28 01:58:04 -05:00 |
isa
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arch: get rid of dummy var init
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2016-02-06 17:21:20 -08:00 |
linux
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syscall_emul: extend mmap system call to support file backed mmaps
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2016-03-17 10:24:17 -07:00 |
decoder.cc
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ISA,CPU: Generalize and split out the components of the decode cache.
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2012-05-26 13:45:12 -07:00 |
decoder.hh
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isa: Add parameter to pick different decoder inside ISA
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2015-10-09 14:50:54 -05:00 |
faults.hh
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Faults: Replace calls to genMachineCheckFault with M5PanicFault.
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2011-09-27 00:24:43 -07:00 |
interrupts.cc
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SE/FS: Build the Interrupt objects in SE mode.
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2011-10-09 00:15:50 -07:00 |
interrupts.hh
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SE/FS: Build the Interrupt objects in SE mode.
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2011-10-09 00:15:50 -07:00 |
isa.cc
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arch: Make the ISA class inherit from SimObject
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2013-01-07 13:05:35 -05:00 |
isa.hh
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revert 5af8f40d8f2c
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2015-07-28 01:58:04 -05:00 |
isa_traits.hh
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arch: Cleanup unused ISA traits constants
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2014-09-03 07:42:21 -04:00 |
kernel_stats.hh
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Power: Add a stub kernel_stats.hh.
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2011-11-13 12:40:15 -08:00 |
locked_mem.hh
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cpu: Add CPU support for generatig wake up events when LLSC adresses are snooped.
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2014-01-24 15:29:30 -06:00 |
microcode_rom.hh
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Make commenting on close namespace brackets consistent.
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2011-01-03 14:35:43 -08:00 |
miscregs.hh
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Make commenting on close namespace brackets consistent.
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2011-01-03 14:35:43 -08:00 |
mmapped_ipr.hh
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arch: Add support for m5ops using mmapped IPRs
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2013-09-30 12:20:43 +02:00 |
pagetable.cc
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sim: Refactor the serialization base class
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2015-07-07 09:51:03 +01:00 |
pagetable.hh
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sim: Refactor the serialization base class
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2015-07-07 09:51:03 +01:00 |
PowerInterrupts.py
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sim: Include object header files in SWIG interfaces
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2012-11-02 11:32:01 -05:00 |
PowerISA.py
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arch: Make the ISA class inherit from SimObject
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2013-01-07 13:05:35 -05:00 |
PowerTLB.py
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sim: Include object header files in SWIG interfaces
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2012-11-02 11:32:01 -05:00 |
process.cc
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base: support dynamic loading of Linux ELF objects in SE mode
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2016-03-17 10:31:03 -07:00 |
process.hh
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mem: adding architectural page table support for SE mode
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2014-08-28 10:11:44 -05:00 |
pseudo_inst.hh
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kvm, x86: Adding support for SE mode execution
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2014-11-23 18:01:08 -08:00 |
registers.hh
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revert 5af8f40d8f2c
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2015-07-28 01:58:04 -05:00 |
remote_gdb.cc
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arm: remote GDB: rationalize structure of register offsets
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2015-12-18 15:12:07 -06:00 |
remote_gdb.hh
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arm: remote GDB: rationalize structure of register offsets
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2015-12-18 15:12:07 -06:00 |
SConscript
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style: remove trailing whitespace
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2016-02-06 17:21:18 -08:00 |
SConsopts
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POWER: Add support for the Power ISA
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2009-10-27 09:24:39 -07:00 |
stacktrace.cc
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arch: Use const StaticInstPtr references where possible
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2014-09-27 09:08:36 -04:00 |
stacktrace.hh
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arch: Use const StaticInstPtr references where possible
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2014-09-27 09:08:36 -04:00 |
tlb.cc
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sim: Refactor the serialization base class
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2015-07-07 09:51:03 +01:00 |
tlb.hh
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scons: Add missing override to appease clang
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2016-02-23 03:27:20 -05:00 |
types.hh
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misc: Remove redundant compiler-specific defines
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2015-10-12 04:07:59 -04:00 |
utility.cc
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revert 5af8f40d8f2c
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2015-07-28 01:58:04 -05:00 |
utility.hh
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arch: Use const StaticInstPtr references where possible
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2014-09-27 09:08:36 -04:00 |
vtophys.cc
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Implement Ali's review feedback.
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2012-01-29 02:04:34 -08:00 |
vtophys.hh
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Merge with main repository.
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2012-01-30 21:07:57 -08:00 |