gem5/src/arch/x86/isa
Vince Weaver 8f6744c19c X86: add ULL to 1's being shifted in 64-bit values
Some of the micro-ops weren't casting 1 to ULL before shifting,
which can cause problems.  On the perl makerand input this
caused some values to be negative that shouldn't have been.

The casts are done as ULL(1) instead of 1ULL to match others
in the m5 code base.
2009-11-11 17:49:09 -05:00
..
decoder X86: Implement movd_Vo_Edp on X86 2009-10-30 15:52:33 -04:00
formats X86: Hook in the M5 pseudo insts. 2009-01-06 23:55:46 -08:00
insts X86: Fix bugs in movd implementation. 2009-11-10 11:29:30 -05:00
microops X86: add ULL to 1's being shifted in 64-bit values 2009-11-11 17:49:09 -05:00
bitfields.isa X86: Add a bitfield to indicate whether or not an REX prefix was present. 2007-07-30 13:17:34 -07:00
includes.isa X86: Implement an integer media addition microop with optional saturation. 2009-08-17 20:04:02 -07:00
macroop.isa X86: Respect segment override prefixes even when there's no ModRM byte. 2009-02-27 09:23:58 -08:00
main.isa Pull some hard coded base classes out of the isa description. 2007-07-14 17:14:19 -07:00
microasm.isa X86: Add microassembler symbols for floating point stack register operands. 2009-08-20 00:41:27 -07:00
operands.isa X86: Implement shift right/left double microops. 2009-08-07 10:13:20 -07:00
outputblock.isa Pull some hard coded base classes out of the isa description. 2007-07-14 17:14:19 -07:00
rom.isa X86: Implement local labels for the ROM that actually refer into the ROM. 2008-10-12 20:44:11 -07:00
specialize.isa X86: Ignore the size part of XMM/MMX operands. The instructions know what they want. 2009-08-17 18:15:23 -07:00