gem5/python/m5/objects
Nathan Binkert 8e9d44477c Major update to sinic to support VSINIC better
dev/sinic.cc:
    - Size the virtualRegs array based on the configured value
    - Add debugging stuff for uniquely identifying vnic usage
    - Only count totally unprocessed packets when notifying via RxDone
    - Add initial virtual address support
    - Fix some bugs in accessing packets out of order to make sure that
    busy packets are processed first
    - Add fifo watermark stuff
    - Make number of vnics, zero/delay copy and watermarks parameters
dev/sinic.hh:
    add rxUnique and txUnique to uniquely identify tx and rx VNICs
    Create a separate list of Busy VNICs since more than one might
    be busy and we want to service those first
    Add more watermark stuff and new parameters
dev/sinicreg.hh:
    Make the number of virtual nics a read-only parameter
    add bits for ZeroCopy/DelayCopy
    rename Virtual to Vaddr so it's not ambiguous
    Add a flag for TxData/RxData to indicate a virtual address
    Report rxfifo status in RxDone
python/m5/objects/Ethernet.py:
    add more options for the fifo thresholds
    add number of vnics as a parameter
    add copy type as a parameter
    add virtual addressing as a parameter

--HG--
extra : convert_revision : 850e2433b585d65469d4c5d85ad7ca820db10f4a
2006-04-26 17:52:33 -04:00
..
AlphaConsole.py Allow CPUs to specify their own CPU ids. 2005-06-29 01:20:41 -04:00
AlphaFullCPU.py Major cleanup of python config code. 2005-05-29 01:14:50 -04:00
AlphaTLB.py Major cleanup of python config code. 2005-05-29 01:14:50 -04:00
BadDevice.py Major cleanup of python config code. 2005-05-29 01:14:50 -04:00
BaseCache.py Standardize clock parameter names to 'clock'. 2005-06-01 21:44:00 -04:00
BaseCPU.py Allow CPUs to specify their own CPU ids. 2005-06-29 01:20:41 -04:00
Bus.py Standardize clock parameter names to 'clock'. 2005-06-01 21:44:00 -04:00
CoherenceProtocol.py Major cleanup of python config code. 2005-05-29 01:14:50 -04:00
Device.py io_bus is split out into pio_bus and dma_bus so that any device 2005-11-20 16:57:53 -05:00
DiskImage.py Major cleanup of python config code. 2005-05-29 01:14:50 -04:00
Ethernet.py Major update to sinic to support VSINIC better 2006-04-26 17:52:33 -04:00
Ide.py Major cleanup of python config code. 2005-05-29 01:14:50 -04:00
IntrControl.py Major cleanup of python config code. 2005-05-29 01:14:50 -04:00
MemTest.py Major cleanup of python config code. 2005-05-29 01:14:50 -04:00
Pci.py BARs now of type MemorySize32 2005-11-21 00:02:39 -05:00
PhysicalMemory.py Major cleanup of python config code. 2005-05-29 01:14:50 -04:00
Platform.py Major cleanup of python config code. 2005-05-29 01:14:50 -04:00
Process.py Add executable parameter to LiveProcess. This allows the argv[0] value to 2005-10-01 16:02:47 -04:00
Repl.py Major cleanup of python config code. 2005-05-29 01:14:50 -04:00
Root.py Add execution trace object to Root. 2005-10-06 13:50:13 -04:00
SimConsole.py Major cleanup of python config code. 2005-05-29 01:14:50 -04:00
SimpleDisk.py Major cleanup of python config code. 2005-05-29 01:14:50 -04:00
System.py move alpha specific code into arch/alpha 2006-03-04 20:45:01 -05:00
Tsunami.py Changes for getting FreeBSD to run. 2005-08-15 16:59:58 -04:00
Uart.py make all of the turbolaser stuff only compile if ALPHA_TLASER 2005-06-05 01:24:17 -04:00