make all of the turbolaser stuff only compile if ALPHA_TLASER

is defined.

build/SConstruct:
    Default ALPHA_TLASER to false
dev/uart8250.cc:
    fix paths

--HG--
extra : convert_revision : 3616b5b4b9060860a73568a4ed4f1e8eb991938f

SConscript

@@ -280,25 +280,8 @@ full_system_sources = Split('''
 	dev/tsunami_io.cc
 	dev/tsunami_pchip.cc
 	dev/uart.cc
-	dev/uart8530.cc
 	dev/uart8250.cc
 
-	encumbered/dev/dma.cc
-	encumbered/dev/etherdev.cc
-	encumbered/dev/scsi.cc
-	encumbered/dev/scsi_ctrl.cc
-	encumbered/dev/scsi_disk.cc
-	encumbered/dev/scsi_none.cc
-	encumbered/dev/tlaser_clock.cc
-	encumbered/dev/tlaser_ipi.cc
-	encumbered/dev/tlaser_mbox.cc
-	encumbered/dev/tlaser_mc146818.cc
-	encumbered/dev/tlaser_node.cc
-	encumbered/dev/tlaser_pcia.cc
-	encumbered/dev/tlaser_pcidev.cc
-	encumbered/dev/tlaser_serial.cc
-	encumbered/dev/turbolaser.cc
-
 	kern/kernel_binning.cc
 	kern/kernel_stats.cc
 	kern/system_events.cc
@@ -318,6 +301,26 @@ full_system_sources = Split('''
 	sim/system.cc
         ''')
 
+# turbolaser encumbered sources
+turbolaser_sources = Split('''
+	encumbered/dev/dma.cc
+	encumbered/dev/etherdev.cc
+	encumbered/dev/scsi.cc
+	encumbered/dev/scsi_ctrl.cc
+	encumbered/dev/scsi_disk.cc
+	encumbered/dev/scsi_none.cc
+	encumbered/dev/tlaser_clock.cc
+	encumbered/dev/tlaser_ipi.cc
+	encumbered/dev/tlaser_mbox.cc
+	encumbered/dev/tlaser_mc146818.cc
+	encumbered/dev/tlaser_node.cc
+	encumbered/dev/tlaser_pcia.cc
+	encumbered/dev/tlaser_pcidev.cc
+	encumbered/dev/tlaser_serial.cc
+	encumbered/dev/turbolaser.cc
+	encumbered/dev/uart8530.cc
+        ''')
+
 # Syscall emulation (non-full-system) sources
 syscall_emulation_sources = Split('''
 	arch/alpha/alpha_common_syscall_emul.cc
@@ -364,6 +367,8 @@ sources = base_sources
 
 if env['FULL_SYSTEM']:
     sources += full_system_sources
+    if env['ALPHA_TLASER']:
+        sources += turbolaser_sources
 else:
     sources += syscall_emulation_sources
 

build/SConstruct

@@ -234,6 +234,7 @@ default_env = Environment(ENV = os.environ,  # inherit user's enviroment vars
                           EXT_SRCDIR = EXT_SRCDIR,
                           CPPDEFINES = [],
                           FULL_SYSTEM = False,
+                          ALPHA_TLASER = False,
                           USE_MYSQL = False)
 
 default_env.SConsignFile("sconsign")

dev/uart8250.cc

@@ -42,7 +42,7 @@
 #include "mem/bus/bus.hh"
 #include "mem/bus/pio_interface.hh"
 #include "mem/bus/pio_interface_impl.hh"
-#include "mem/functional_mem/memory_control.hh"
+#include "mem/functional/memory_control.hh"
 #include "sim/builder.hh"
 
 using namespace std;

python/m5/objects/Ethernet.py

@@ -31,27 +31,33 @@ class EtherDump(SimObject):
     type = 'EtherDump'
     file = Param.String("dump file")
 
-class EtherDev(DmaDevice):
-    type = 'EtherDev'
-    hardware_address = Param.EthernetAddr(NextEthernetAddr,
-        "Ethernet Hardware Address")
+if build_env['ALPHA_TLASER']:
 
-    dma_data_free = Param.Bool(False, "DMA of Data is free")
-    dma_desc_free = Param.Bool(False, "DMA of Descriptors is free")
-    dma_read_delay = Param.Latency('0us', "fixed delay for dma reads")
-    dma_read_factor = Param.Latency('0us', "multiplier for dma reads")
-    dma_write_delay = Param.Latency('0us', "fixed delay for dma writes")
-    dma_write_factor = Param.Latency('0us', "multiplier for dma writes")
-    dma_no_allocate = Param.Bool(True, "Should we allocate cache on read")
+    class EtherDev(DmaDevice):
+        type = 'EtherDev'
+        hardware_address = Param.EthernetAddr(NextEthernetAddr,
+            "Ethernet Hardware Address")
 
-    rx_filter = Param.Bool(True, "Enable Receive Filter")
-    rx_delay = Param.Latency('1us', "Receive Delay")
-    tx_delay = Param.Latency('1us', "Transmit Delay")
+        dma_data_free = Param.Bool(False, "DMA of Data is free")
+        dma_desc_free = Param.Bool(False, "DMA of Descriptors is free")
+        dma_read_delay = Param.Latency('0us', "fixed delay for dma reads")
+        dma_read_factor = Param.Latency('0us', "multiplier for dma reads")
+        dma_write_delay = Param.Latency('0us', "fixed delay for dma writes")
+        dma_write_factor = Param.Latency('0us', "multiplier for dma writes")
+        dma_no_allocate = Param.Bool(True, "Should we allocate cache on read")
 
-    intr_delay = Param.Latency('0us', "Interrupt Delay")
-    payload_bus = Param.Bus(NULL, "The IO Bus to attach to for payload")
-    physmem = Param.PhysicalMemory(Parent.any, "Physical Memory")
-    tlaser = Param.Turbolaser(Parent.any, "Turbolaser")
+        rx_filter = Param.Bool(True, "Enable Receive Filter")
+        rx_delay = Param.Latency('1us', "Receive Delay")
+        tx_delay = Param.Latency('1us', "Transmit Delay")
+
+        intr_delay = Param.Latency('0us', "Interrupt Delay")
+        payload_bus = Param.Bus(NULL, "The IO Bus to attach to for payload")
+        physmem = Param.PhysicalMemory(Parent.any, "Physical Memory")
+        tlaser = Param.Turbolaser(Parent.any, "Turbolaser")
+
+    class EtherDevInt(EtherInt):
+        type = 'EtherDevInt'
+        device = Param.EtherDev("Ethernet device of this interface")
 
 class NSGigE(PciDevice):
     type = 'NSGigE'
@@ -82,10 +88,6 @@ class NSGigE(PciDevice):
     payload_bus = Param.Bus(NULL, "The IO Bus to attach to for payload")
     physmem = Param.PhysicalMemory(Parent.any, "Physical Memory")
 
-class EtherDevInt(EtherInt):
-    type = 'EtherDevInt'
-    device = Param.EtherDev("Ethernet device of this interface")
-
 class NSGigEInt(EtherInt):
     type = 'NSGigEInt'
     device = Param.NSGigE("Ethernet device of this interface")

python/m5/objects/Uart.py

@@ -10,6 +10,7 @@ class Uart(PioDevice):
 class Uart8250(Uart):
     type = 'Uart8250'
 
-class Uart8530(Uart):
-    type = 'Uart8530'
+if build_env['ALPHA_TLASER']:
+    class Uart8530(Uart):
+        type = 'Uart8530'