gem5/tests/quick/se/00.hello
Andreas Hansson 54227f9e57 Stats: Update stats for new default L1-to-L2 bus clock and width
This patch updates the stats to reflect the changes in the clock speed
and width for the bus connecting the L1 and L2 caches.
2012-10-15 08:09:54 -04:00
..
ref Stats: Update stats for new default L1-to-L2 bus clock and width 2012-10-15 08:09:54 -04:00
test.py CheckerCPU: Make some basic regression tests for CheckerCPU 2012-03-09 09:59:28 -05:00