Ali Saidi 81a00fdcfe Allocate the correct number of global registers ... Fix fault formating and code for traps fix a couple of bugs in the decoder Cleanup/fix page table entry code Implement more mmaped iprs, fix numbered tlb insertion code, add function to dump tlb contents Don't panic if we differ from legion on a tcc instruction because of where legion prints its data and where we print our data src/arch/sparc/faults.cc: Fix fault formating and code for traps src/arch/sparc/intregfile.hh: allocate the correct number of global registers src/arch/sparc/isa/decoder.isa: fix a couple of bugs in the decoder: wrasi should write asi not ccr, done/retry should get hpstate from htstate src/arch/sparc/pagetable.hh: cleanup/fix page table code src/arch/sparc/tlb.cc: implement more mmaped iprs, fix numbered insertion code, add function to dump tlb contents src/arch/sparc/tlb.hh: add functions to write TagAccess register on tlb miss and to dump all tlb entries for debugging src/cpu/exetrace.cc: dump tlb entries on error, don't consider differences the cycle we take a trap to be bad. --HG-- extra : convert_revision : d7d771900f6f25219f3dc6a6e51986d342a32e03		2006-12-09 18:00:40 -05:00
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alpha	Merge zizzer:/bk/newmem	2006-11-29 17:11:20 -05:00
mips	Add support for mmapped iprs to atomic cpu	2006-11-29 17:11:10 -05:00
sparc	Allocate the correct number of global registers	2006-12-09 18:00:40 -05:00
isa_parser.py	Many more fixes for SPARC_FS. Gets us to the point where SOFTINT starts	2006-12-06 14:29:10 -05:00
isa_specific.hh	Updated Authors from bk prs info	2006-05-31 19:26:56 -04:00
SConscript	Add support for mmapped iprs to atomic cpu	2006-11-29 17:11:10 -05:00