gem5/src/arch/x86
Gabe Black 7f079149f1 X86: Make signed multiplication do something different from unsigned.
--HG--
extra : convert_revision : 333c4a3464d708d4d8cea88931259ab96c2f75ed
2007-09-06 16:25:29 -07:00
..
insts X86: Make signed versions of partial register values available to microops. 2007-09-06 16:22:08 -07:00
isa X86: Make signed multiplication do something different from unsigned. 2007-09-06 16:25:29 -07:00
linux X86: Hook in an implementation for lseek. 2007-08-28 17:34:15 -07:00
arguments.hh Add build hooks for x86. 2007-03-03 16:01:48 +00:00
emulenv.cc X86: Start implementing segmentation support. 2007-08-04 20:12:54 -07:00
emulenv.hh X86: Start implementing segmentation support. 2007-08-04 20:12:54 -07:00
faults.hh Address translation: Make the page table more flexible. 2007-08-26 20:33:57 -07:00
floatregfile.cc X86: Add tracing to the floating point register file. 2007-09-04 23:40:47 -07:00
floatregfile.hh X86: Add floating point micro registers. 2007-09-04 23:31:40 -07:00
floatregs.hh X86: Add floating point micro registers. 2007-09-04 23:31:40 -07:00
interrupts.hh Add build hooks for x86. 2007-03-03 16:01:48 +00:00
intregfile.cc Add some dprintfs 2007-06-12 16:22:35 +00:00
intregfile.hh Add a spot for the condition code portion of the flag register. 2007-07-17 13:26:06 -07:00
intregs.hh X86: Make signed versions of partial register values available to microops. 2007-09-06 16:22:08 -07:00
isa_traits.hh X86: Make sure FP_Base_DepTag is big enough to avoid trouble. 2007-07-30 13:29:56 -07:00
kernel_stats.hh Add build hooks for x86. 2007-03-03 16:01:48 +00:00
locked_mem.hh Stub implementation for x86 2007-03-05 16:08:18 +00:00
miscregfile.cc X86: Start implementing segmentation support. 2007-08-04 20:12:54 -07:00
miscregfile.hh Fill out the miscreg file and add types to miscregs.hh 2007-07-18 16:12:39 -07:00
miscregs.hh X86: Flesh out register indexing constants. 2007-08-29 20:34:52 -07:00
mmaped_ipr.hh Stub implementation for x86. 2007-03-05 16:09:09 +00:00
pagetable.hh Add some new source files. 2007-03-05 17:56:26 +00:00
predecoder.cc Add a special case for "test" which needs an immediate even though everything else with it's opcode doesn't. 2007-07-24 15:37:16 -07:00
predecoder.hh Fixed immediate byte accounting bug. 2007-07-22 02:34:52 +00:00
predecoder_tables.cc The groups of instructions hanging off opcode 71h, 72h, and 73h all need a byte immediate 2007-07-24 15:19:02 -07:00
process.cc Address translation: Make the page table more flexible. 2007-08-26 20:33:57 -07:00
process.hh Get X86 to load an elf and start a process for it. 2007-03-06 15:42:30 +00:00
regfile.cc Make the register indices use the appropriate "fold" bit. 2007-07-30 13:25:00 -07:00
regfile.hh *MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg 2007-03-07 15:04:31 -05:00
remote_gdb.cc Add some new source files. 2007-03-05 17:56:26 +00:00
remote_gdb.hh Add in NumGDBRegs so the constructor to the base class can get all it's arguments. 2007-03-05 17:58:15 +00:00
SConscript Address Translation: Make SE mode use an actual TLB/MMU for translation like FS. 2007-08-26 20:24:18 -07:00
SConsopts Rework the way SCons recurses into subdirectories, making it 2007-03-10 23:00:54 -08:00
segmentregs.hh Define symbols for the x86 specialization of the microassembler. 2007-06-21 15:28:08 +00:00
stacktrace.hh Filled in a stub header file for a stacktrace object. I'm still not sure what this is for, and it probably doesn't work on anything but Alpha. 2007-03-05 14:52:28 +00:00
syscallreturn.hh X86: Make x86 syscall return just stuff the return value in eax. 2007-08-29 20:29:18 -07:00
tlb.cc X86: Get x86 to compile again after the simobject constructor change. 2007-08-31 13:02:58 -07:00
tlb.hh X86: Get x86 to compile again after the simobject constructor change. 2007-08-31 13:02:58 -07:00
types.hh X86: Start implementing segmentation support. 2007-08-04 20:12:54 -07:00
utility.hh Get rid of the immediate and displacement components of the EmulEnv struct and use them directly out of the instruction. The extra copies are conceptually realistic but are just innefficient as implemented. Also don't use the zeroeth microcode register for general storage since it's now the zero register, and implement a load and a store microops. 2007-06-19 14:18:25 +00:00
vtophys.hh Fill out a stub version of the vtophys header file. 2007-03-05 17:59:04 +00:00
x86_traits.hh X86: Add floating point micro registers. 2007-09-04 23:31:40 -07:00
X86TLB.py Address Translation: Make SE mode use an actual TLB/MMU for translation like FS. 2007-08-26 20:24:18 -07:00