Korey Sewell a91ee5abc2 FP programs are back to running... Condition Codes can be read and set... ... Special Regs (Hi,Lo,FCSR) are now added to the operands for use in decoder.isa. Now it's back to just debugging execution of code for the release (those unaligned memory access instruction pairs are still quite the pain i might add) arch/mips/isa_traits.hh: declare functions for .cc file arch/mips/isa_traits.cc: delete unnecessary overloaded functions implement condition code functions implement round function arch/mips/isa/base.isa: remove R31 constant... define in the operands.isa file instead arch/mips/isa/decoder.isa: wholesale changes once again to FP. Now the FP Condition Codes are implemented and the FP programs can run and complete to finish. Use isnan() instead of my unorderedFP() function Also, we now access special regs such as HI,LO,FCSR,etc. just like we do any other reg. operand arch/mips/isa/operands.isa: add more operands for special control regs in int and FP regfiles arch/mips/isa/formats/branch.isa: use R31 instead of r31 arch/mips/isa/formats/fp.isa: use MakeCCVector to set Condition Codes in FCSR arch/mips/regfile/float_regfile.hh: treat control regs like any other reg. Just Index them after the regular architectural registers arch/mips/regfile/int_regfile.hh: treat hi,lo as regular int. regs w/special indexing arch/mips/regfile/regfile.hh: no longer need for special register accesses with their own function. --HG-- rename : arch/mips/regfile.hh => arch/mips/regfile/regfile.hh extra : convert_revision : 5d2f8fdb59606de2b2e9db3e0a085240561e479e		2006-05-12 02:57:32 -04:00
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basic.isa	updated MIPS ISA files .... all files should be able to compile/build with MIPS option except isa_traits.*	2006-03-08 02:05:38 -05:00
branch.isa	FP programs are back to running... Condition Codes can be read and set...	2006-05-12 02:57:32 -04:00
formats.isa	Make .isa-file ##include file paths relative to including file.	2006-03-28 22:29:42 -05:00
fp.isa	FP programs are back to running... Condition Codes can be read and set...	2006-05-12 02:57:32 -04:00
int.isa	These fixes now allow all of the 20 mips tests to work properly!	2006-04-14 03:42:02 -04:00
mem.isa	Rewrite CFC1 & CTC1 instruction definitions	2006-04-27 05:07:11 -04:00
noop.isa	Minor Sconscript edit ... mips decoder changes ... initialize NNPC and output fault name in simple cpu	2006-03-14 18:28:51 -05:00
tlbop.isa	add at least BasicOp Format to most if not all instructions	2006-02-08 14:50:07 -05:00
trap.isa	updated MIPS ISA files .... all files should be able to compile/build with MIPS option except isa_traits.*	2006-03-08 02:05:38 -05:00
unimp.isa	Finally MIPS does hello world!	2006-04-10 12:23:17 -04:00
unknown.isa	Finally MIPS does hello world!	2006-04-10 12:23:17 -04:00
util.isa	Use lower two bits of FCSR reg to determine rounding mode (may want to move this out of decoder.isa and into a template)	2006-04-28 00:24:25 -04:00