gem5/sim
Gabe Black b161d2a731 Merge gblack@m5.eecs.umich.edu:/bk/multiarch
into  ewok.(none):/home/gblack/m5/multiarch

--HG--
extra : convert_revision : d8626acb2686e123ad0bb6cf94e85c992657470d
2006-02-16 01:25:48 -05:00
..
async.hh Many files: 2005-06-05 05:16:00 -04:00
builder.cc Many files: 2005-06-05 05:16:00 -04:00
builder.hh Many files: 2005-06-05 05:16:00 -04:00
byteswap.hh endian fixes and compiles on mac os x 2006-02-15 01:23:13 -05:00
debug.cc Many files: 2005-06-05 05:16:00 -04:00
debug.hh Many files: 2005-06-05 05:16:00 -04:00
eventq.cc Many files: 2005-06-05 05:16:00 -04:00
eventq.hh Many files: 2005-06-05 05:16:00 -04:00
faults.cc Changed the fault enum into a class, and fixed everything up to work with it. Next, the faults need to be pulled out of all the other code so that they are only used to communicate between the CPU and the ISA. 2006-02-16 01:22:51 -05:00
faults.hh Changed the fault enum into a class, and fixed everything up to work with it. Next, the faults need to be pulled out of all the other code so that they are only used to communicate between the CPU and the ISA. 2006-02-16 01:22:51 -05:00
host.hh Many files: 2005-06-05 05:16:00 -04:00
main.cc Many files: 2005-06-05 05:16:00 -04:00
param.cc fixes for gcc 4.0 2005-09-12 03:01:43 -04:00
param.hh Fixes to build with gcc 4.0. 2005-09-02 21:30:02 -04:00
process.cc endian fixes and compiles on mac os x 2006-02-15 01:23:13 -05:00
process.hh Removed isa_traits.hh from targetarch, moved vptr.hh from arch/alpha to sim, fixed an include to have the new location, and removed an ambiguating function declaration in byteswap.hh. 2006-02-12 12:40:58 -05:00
pseudo_inst.cc Pseudo instructions are now passed whatever instructions they need by the decoder, rather than extracting them explicitly. This lets most of the pseudo instruction code to be shared across architectures. 2006-02-12 17:38:10 -05:00
pseudo_inst.hh Pseudo instructions are now passed whatever instructions they need by the decoder, rather than extracting them explicitly. This lets most of the pseudo instruction code to be shared across architectures. 2006-02-12 17:38:10 -05:00
root.cc Convert type of max_time and progress_interval parameters 2005-09-01 11:32:58 -04:00
serialize.cc fix the MAX_CHECKPOINTS stuff 2005-09-18 21:20:24 -04:00
serialize.hh Many files: 2005-06-05 05:16:00 -04:00
sim_events.cc Move max_time and progress_interval parameters to the Root 2005-06-22 09:59:13 -04:00
sim_events.hh Move max_time and progress_interval parameters to the Root 2005-06-22 09:59:13 -04:00
sim_exit.hh Many files: 2005-06-05 05:16:00 -04:00
sim_object.cc Many files: 2005-06-05 05:16:00 -04:00
sim_object.hh Many files: 2005-06-05 05:16:00 -04:00
startup.cc Many files: 2005-06-05 05:16:00 -04:00
startup.hh Many files: 2005-06-05 05:16:00 -04:00
stat_control.cc Fix bug where simulation terminates same cycle as last stat dump causing a duplicate row in db 2005-11-02 14:45:35 -05:00
stat_control.hh Many files: 2005-06-05 05:16:00 -04:00
stats.hh Many files: 2005-06-05 05:16:00 -04:00
syscall_emul.cc Changed the fault enum into a class, and fixed everything up to work with it. Next, the faults need to be pulled out of all the other code so that they are only used to communicate between the CPU and the ISA. 2006-02-16 01:22:51 -05:00
syscall_emul.hh Merge gblack@m5.eecs.umich.edu:/bk/multiarch 2006-02-16 01:25:48 -05:00
system.cc Alot of changes to push towards ISA independence. Highlights are renaming of the isa_desc files, movement of byte_swap.hh into sim, and the creation of arch/isa_traits.hh 2006-02-08 01:03:55 -05:00
system.hh Make the debugger a bit more useful with m5.opt by moving stuff 2005-11-28 18:33:48 -05:00
vptr.hh Removed isa_traits.hh from targetarch, moved vptr.hh from arch/alpha to sim, fixed an include to have the new location, and removed an ambiguating function declaration in byteswap.hh. 2006-02-12 12:40:58 -05:00