Andreas Hansson 7216681561 config: Reduce DRAM controller regression traffic rate ... This patch changes the traffic generator period such that it does not completely saturate the DRAM controller and create an ever-growing backlog in the queued port. A separate patch updates the stats.		2013-01-07 13:05:36 -05:00
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configs	tests: Always specify memory mode in every test system.	2013-01-07 13:05:33 -05:00
long	regressions: stats update due to decoder changes	2013-01-04 19:00:48 -06:00
quick	config: Reduce DRAM controller regression traffic rate	2013-01-07 13:05:36 -05:00
test-progs/hello	X86: Add a 32 bit hello world test binary.	2012-05-27 19:01:09 -07:00
diff-out	tests: fix diff-out script for op/inst stat changes.	2012-02-12 18:35:59 -06:00
halt.sh	Rearrange the FS configs to be more shared. Also check in the full-system tests. Reference stats coming soon.	2006-07-21 15:56:35 -04:00
run.py	arch: Make the ISA class inherit from SimObject	2013-01-07 13:05:35 -05:00
SConscript	SimpleDRAM: A basic SimpleDRAM regression	2012-09-21 11:48:14 -04:00