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checker
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Rename the StaticInst-based (read|set)(Int|Float)Reg methods to (read|set)(Int|Float)RegOperand to distinguish from non-StaticInst version.
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2006-12-12 09:58:40 -08:00 |
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memtest
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Make CPU models signal to update the snoop ranges
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2006-11-13 18:51:16 -05:00 |
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o3
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Rename the StaticInst-based (read|set)(Int|Float)Reg methods to (read|set)(Int|Float)RegOperand to distinguish from non-StaticInst version.
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2006-12-12 09:58:40 -08:00 |
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ozone
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Rename the StaticInst-based (read|set)(Int|Float)Reg methods to (read|set)(Int|Float)RegOperand to distinguish from non-StaticInst version.
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2006-12-12 09:58:40 -08:00 |
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simple
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Rename the StaticInst-based (read|set)(Int|Float)Reg methods to (read|set)(Int|Float)RegOperand to distinguish from non-StaticInst version.
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2006-12-12 09:58:40 -08:00 |
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trace
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Move main control from C++ into Python.
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2006-06-09 23:01:31 -04:00 |
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activity.cc
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Update copyright.
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2006-06-07 16:02:55 -04:00 |
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activity.hh
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Update copyright.
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2006-06-07 16:02:55 -04:00 |
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base.cc
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Make cpu's capable of having a phase shift
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2006-11-14 01:10:36 -05:00 |
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base.hh
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Make cpu's capable of having a phase shift
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2006-11-14 01:10:36 -05:00 |
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base_dyn_inst.hh
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Rename the StaticInst-based (read|set)(Int|Float)Reg methods to (read|set)(Int|Float)RegOperand to distinguish from non-StaticInst version.
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2006-12-12 09:58:40 -08:00 |
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base_dyn_inst_impl.hh
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Add in support for LL/SC in the O3 CPU. Needs to be fully tested.
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2006-10-23 14:00:07 -04:00 |
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cpu_models.py
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Use O3DynInst in cpu_models.py and in static_inst_exec_sigs.hh instead of a specific ISA dyn. inst.
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2006-07-06 12:18:55 -04:00 |
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cpuevent.cc
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Change ExecContext to ThreadContext. This is being renamed to differentiate between the interface used objects outside of the CPU, and the interface used by the ISA. ThreadContext is used by objects outside of the CPU and is specifically defined in thread_context.hh. ExecContext is more implicit, and is defined by files such as base_dyn_inst.hh or cpu/simple/base.hh.
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2006-06-06 17:32:21 -04:00 |
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cpuevent.hh
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The tc needs to be protected instead of private so that the CpuEventWrapper can access it.
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2006-11-03 11:05:56 -05:00 |
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exec_context.hh
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Rename the StaticInst-based (read|set)(Int|Float)Reg methods to (read|set)(Int|Float)RegOperand to distinguish from non-StaticInst version.
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2006-12-12 09:58:40 -08:00 |
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exetrace.cc
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Certain header files should only be used in FS.
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2006-11-11 07:15:16 -05:00 |
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exetrace.hh
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add code to operate in lockstep with legion
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2006-11-07 15:51:37 -05:00 |
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func_unit.cc
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Reorganization to move FuncUnit, FUDesc, and OpDesc out of the encumbered directory and into the normal cpu directory.
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2006-06-16 17:52:15 -04:00 |
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func_unit.hh
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Reorganization to move FuncUnit, FUDesc, and OpDesc out of the encumbered directory and into the normal cpu directory.
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2006-06-16 17:52:15 -04:00 |
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inst_seq.hh
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fixes so that M5 will compile under solaris
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2006-11-04 21:41:01 -05:00 |
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intr_control.cc
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Change ExecContext to ThreadContext. This is being renamed to differentiate between the interface used objects outside of the CPU, and the interface used by the ISA. ThreadContext is used by objects outside of the CPU and is specifically defined in thread_context.hh. ExecContext is more implicit, and is defined by files such as base_dyn_inst.hh or cpu/simple/base.hh.
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2006-06-06 17:32:21 -04:00 |
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intr_control.hh
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Updated Authors from bk prs info
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2006-05-31 19:26:56 -04:00 |
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m5legion_interface.h
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fix endian issues with condition codes
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2006-11-10 20:17:42 -05:00 |
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op_class.cc
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Updated Authors from bk prs info
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2006-05-31 19:26:56 -04:00 |
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op_class.hh
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Merge ktlim@zizzer:/bk/newmem
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2006-06-02 18:19:50 -04:00 |
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pc_event.cc
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Change ExecContext to ThreadContext. This is being renamed to differentiate between the interface used objects outside of the CPU, and the interface used by the ISA. ThreadContext is used by objects outside of the CPU and is specifically defined in thread_context.hh. ExecContext is more implicit, and is defined by files such as base_dyn_inst.hh or cpu/simple/base.hh.
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2006-06-06 17:32:21 -04:00 |
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pc_event.hh
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Added sim/host.hh for the Addr type.
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2006-11-07 05:42:15 -05:00 |
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profile.cc
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Change ExecContext to ThreadContext. This is being renamed to differentiate between the interface used objects outside of the CPU, and the interface used by the ISA. ThreadContext is used by objects outside of the CPU and is specifically defined in thread_context.hh. ExecContext is more implicit, and is defined by files such as base_dyn_inst.hh or cpu/simple/base.hh.
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2006-06-06 17:32:21 -04:00 |
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profile.hh
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Put the ProcessInfo and StackTrace objects into the ISA namespaces.
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2006-11-08 00:52:04 -05:00 |
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quiesce_event.cc
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Add Quiesce trace flag to track CPU quiesce/wakeup events.
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2006-10-21 23:32:14 -07:00 |
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quiesce_event.hh
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Update copyright.
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2006-06-07 16:02:55 -04:00 |
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SConscript
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Update the Memtester, commit a config file/test for it.
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2006-10-09 00:26:10 -04:00 |
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simple_thread.cc
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Update Virtual and Physical ports.
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2006-11-19 17:43:03 -05:00 |
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simple_thread.hh
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Get rid of unused lock code.
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2006-12-12 02:21:03 -05:00 |
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smt.hh
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Updated Authors from bk prs info
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2006-05-31 19:26:56 -04:00 |
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static_inst.cc
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StaticInst support for microcode
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2006-10-12 17:32:02 -04:00 |
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static_inst.hh
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StaticInst support for microcode
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2006-10-12 17:32:02 -04:00 |
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thread_context.hh
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Change the connecting of the physPort and virtPort to the memory object below the CPU to happen every time activateContext is called. The overhead is probably a little higher than necessary, but allows these connections to properly be made when there are CPUs that are inactive until they are switched in.
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2006-11-29 16:07:55 -05:00 |
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thread_state.cc
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Change the connecting of the physPort and virtPort to the memory object below the CPU to happen every time activateContext is called. The overhead is probably a little higher than necessary, but allows these connections to properly be made when there are CPUs that are inactive until they are switched in.
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2006-11-29 16:07:55 -05:00 |
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thread_state.hh
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Change the connecting of the physPort and virtPort to the memory object below the CPU to happen every time activateContext is called. The overhead is probably a little higher than necessary, but allows these connections to properly be made when there are CPUs that are inactive until they are switched in.
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2006-11-29 16:07:55 -05:00 |
