Andreas Hansson 651de2d9af config: Fix the cache class naming in regression scripts ... This patch unifies the naming of the default L1 and L2 caches in the regression configs to be in line with what is used in the se and fs scripts.		2012-10-26 06:42:42 -04:00
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Benchmarks.py	configs: add run scripts for ics/gb versions of android and bbench	2012-06-11 11:07:42 -04:00
CacheConfig.py	Regression: Use CPU clock and 32-byte width for L1-L2 bus	2012-10-15 08:08:08 -04:00
Caches.py	config: Fix the cache class naming in regression scripts	2012-10-26 06:42:42 -04:00
cpu2000.py	cpu2000: Add missing art benchmark to all	2012-01-09 18:08:20 -06:00
FSConfig.py	config: Use SimpleDRAM in full-system, and with o3 and inorder	2012-10-25 13:14:38 -04:00
O3_ARM_v7a.py	Mem: Use cycles to express cache-related latencies	2012-10-15 08:10:54 -04:00
Options.py	se.py: support specifying multiple programs via command line	2012-09-09 09:33:45 -05:00
Simulation.py	Standard Switch: Drain the system before switching CPUs	2012-09-12 21:41:37 -05:00
SysPaths.py	make rcS files read from the m5 source directory, not /dist.	2006-11-08 14:10:25 -05:00