sanchayanmaity/gem5
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity
gem5/src/cpu/o3
History
Kevin Lim 64b4572c3e Merge ktlim@zizzer:/bk/newmem 
into  zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/head

--HG--
extra : convert_revision : a250eed999be9b8acd6f420fdfe8f1b02905beb1
2007-04-09 14:30:49 -04:00
..
alpha Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU functions. 2007-04-04 15:38:59 -04:00
mips Updates for other ISA cpu_builders. 2007-04-04 16:50:48 -04:00
sparc Updates for other ISA cpu_builders. 2007-04-04 16:50:48 -04:00
2bit_local_pred.cc Merge ktlim@zamp:/z/ktlim2/clean/m5-o3 2006-06-04 16:07:54 -04:00
2bit_local_pred.hh Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
base_dyn_inst.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
bpred_unit.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
bpred_unit.hh Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
bpred_unit_impl.hh Make sure the value of PC is actually updated now that the instruction target isn't set explicitly. 2006-12-28 14:29:17 -05:00
btb.cc Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
btb.hh Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
checker_builder.cc Adjustments for the AlphaTLB changing to AlphaISA::TLB and changing register file functions to not take faults 2006-11-01 16:44:45 -05:00
comm.hh Made branch delay slots get squashed, and passed back an NPC and NNPC to start fetching from. 2006-12-16 07:32:06 -05:00
commit.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
commit.hh Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU functions. 2007-04-04 15:38:59 -04:00
commit_impl.hh Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU functions. 2007-04-04 15:38:59 -04:00
cpu.cc Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU functions. 2007-04-04 15:38:59 -04:00
cpu.hh Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU functions. 2007-04-04 15:38:59 -04:00
cpu_policy.hh Merge ktlim@zamp:/z/ktlim2/clean/m5-o3 2006-06-04 16:07:54 -04:00
decode.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
decode.hh Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU functions. 2007-04-04 15:38:59 -04:00
decode_impl.hh Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU functions. 2007-04-04 15:38:59 -04:00
dep_graph.hh Miscellaneous minor fixes. 2006-06-16 17:15:18 -04:00
dyn_inst.hh Added an x86 dyninst 2007-03-05 14:55:45 +00:00
fetch.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
fetch.hh Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU functions. 2007-04-04 15:38:59 -04:00
fetch_impl.hh Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU functions. 2007-04-04 15:38:59 -04:00
free_list.cc Merge ktlim@zizzer:/bk/newmem 2006-06-02 18:19:50 -04:00
free_list.hh Merge ktlim@zizzer:/bk/newmem 2006-06-02 18:19:50 -04:00
fu_pool.cc Reorganization to move FuncUnit, FUDesc, and OpDesc out of the encumbered directory and into the normal cpu directory. 2006-06-16 17:52:15 -04:00
fu_pool.hh Update copyright. 2006-06-07 16:02:55 -04:00
iew.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
iew.hh Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU functions. 2007-04-04 15:38:59 -04:00
iew_impl.hh Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU functions. 2007-04-04 15:38:59 -04:00
inst_queue.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
inst_queue.hh Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU functions. 2007-04-04 15:38:59 -04:00
inst_queue_impl.hh Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU functions. 2007-04-04 15:38:59 -04:00
isa_specific.hh Initial changes to get O3 working with SPARC 2006-11-24 22:06:33 -05:00
lsq.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
lsq.hh Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU functions. 2007-04-04 15:38:59 -04:00
lsq_impl.hh Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU functions. 2007-04-04 15:38:59 -04:00
lsq_unit.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
lsq_unit.hh Merge zizzer.eecs.umich.edu:/bk/newmem 2007-04-04 20:50:49 +00:00
lsq_unit_impl.hh Get the "hard" SPARC instructions working in o3. I don't like that the IsStoreConditional flag needs to be set for them because they aren't store conditional instructions, and I should fix the format code which is not handling the opt_flags correctly. 2007-04-08 01:42:42 +00:00
mem_dep_unit.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
mem_dep_unit.hh Initialize mem dep unit properly. 2006-11-07 13:53:06 -05:00
mem_dep_unit_impl.hh Handle status bits a little better, as well as non-speculative instructions. 2007-03-23 11:40:53 -04:00
params.hh Remove mem parameter. Now the translating port asks the CPU's dcache's peer for its MemObject instead of having to have a paramter for the MemObject. 2006-10-31 14:33:56 -05:00
ras.cc Merge ktlim@zizzer:/bk/newmem 2006-06-02 18:19:50 -04:00
ras.hh Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
regfile.hh Take into account that the flattened integer register space is a different size than the architected one. Also fixed some asserts. 2007-04-08 23:31:11 +00:00
rename.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
rename.hh Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU functions. 2007-04-04 15:38:59 -04:00
rename_impl.hh Merge ktlim@zizzer:/bk/newmem 2007-04-09 14:30:49 -04:00
rename_map.cc A couple of minor fixes. 2007-03-23 11:22:43 -04:00
rename_map.hh Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
rob.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
rob.hh Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU functions. 2007-04-04 15:38:59 -04:00
rob_impl.hh Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU functions. 2007-04-04 15:38:59 -04:00
sat_counter.cc Merge ktlim@zizzer:/bk/newmem 2006-06-02 18:19:50 -04:00
sat_counter.hh Merge ktlim@zizzer:/bk/newmem 2006-06-02 18:19:50 -04:00
SConscript Rework the way SCons recurses into subdirectories, making it 2007-03-10 23:00:54 -08:00
SConsopts Rework the way SCons recurses into subdirectories, making it 2007-03-10 23:00:54 -08:00
scoreboard.cc Update copyright. 2006-06-07 16:02:55 -04:00
scoreboard.hh Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
store_set.cc Fixes to get new CPU model working for simple test case. The CPU does not yet support retrying accesses. 2006-06-05 18:14:39 -04:00
store_set.hh Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
thread_context.hh *MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg 2007-03-07 15:04:31 -05:00
thread_context_impl.hh fix segfault when peer owner attempts to use functional port 2007-03-13 17:34:52 -04:00
thread_state.hh Remove mem parameter. Now the translating port asks the CPU's dcache's peer for its MemObject instead of having to have a paramter for the MemObject. 2006-10-31 14:33:56 -05:00
tournament_pred.cc Merge ktlim@zamp:./local/clean/o3-merge/m5 2006-09-30 23:43:23 -04:00
tournament_pred.hh Merge ktlim@zamp:./local/clean/o3-merge/m5 2006-09-30 23:43:23 -04:00