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gem5/cpu
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Steve Reinhardt 62fa781fee Rename sim/universe.{cc,hh} to root.{cc,hh} (since the 
object defined there was renamed Root long ago).

SConscript:
arch/alpha/alpha_linux_process.cc:
arch/alpha/alpha_tru64_process.cc:
base/misc.cc:
base/pollevent.cc:
base/pollevent.hh:
base/stats/events.cc:
base/trace.hh:
cpu/beta_cpu/fetch_impl.hh:
cpu/beta_cpu/full_cpu.cc:
cpu/beta_cpu/inst_queue_impl.hh:
cpu/pc_event.cc:
cpu/static_inst.cc:
dev/etherbus.cc:
dev/etherdump.cc:
dev/etherlink.cc:
dev/ide_disk.cc:
dev/pcidev.cc:
sim/builder.cc:
sim/eventq.cc:
sim/main.cc:
sim/root.cc:
sim/stat_control.cc:
    Rename sim/universe.{cc,hh} to root.{cc,hh}.

--HG--
rename : sim/universe.cc => sim/root.cc
extra : convert_revision : b8699e81e285253d66da75412e7bb2c251c0389a
2005-06-01 21:59:27 -04:00
..
beta_cpu Rename sim/universe.{cc,hh} to root.{cc,hh} (since the 2005-06-01 21:59:27 -04:00
full_cpu Add a new operation class for IPR accesses, and have IPR-accessing 2005-03-01 00:39:57 -05:00
memtest Make the notion of a global event tick independent of the actual 2005-04-11 15:32:06 -04:00
ooo_cpu Large update of several parts of my code. The most notable change is the inclusion of a full-fledged load/store queue. At the moment it still has some issues running, but most of the code is hopefully close to the final version. 2005-05-03 10:56:47 -04:00
simple_cpu Standardize clock parameter names to 'clock'. 2005-06-01 21:44:00 -04:00
trace Make the notion of a global event tick independent of the actual 2005-04-11 15:32:06 -04:00
base_cpu.cc Standardize clock parameter names to 'clock'. 2005-06-01 21:44:00 -04:00
base_cpu.hh Standardize clock parameter names to 'clock'. 2005-06-01 21:44:00 -04:00
base_dyn_inst.cc Added copyright. 2005-05-26 23:30:12 -04:00
base_dyn_inst.hh Added copyright. 2005-05-26 23:30:12 -04:00
exec_context.cc - Clean up and factor out all of the binning code into a 2004-08-20 11:35:31 -04:00
exec_context.hh Changed all syscalls to use syscall return object. 2005-03-09 15:52:10 -05:00
exetrace.cc Fix timing modeling of faults: functionally the very next instruction after 2005-02-25 12:41:08 -05:00
exetrace.hh Updated Copyright with information in bitkeeper changelogs 2004-06-08 13:37:27 -04:00
inst_seq.hh Updated Copyright with information in bitkeeper changelogs 2004-06-08 13:37:27 -04:00
intr_control.cc Updated Copyright with information in bitkeeper changelogs 2004-06-08 13:37:27 -04:00
intr_control.hh Updated Copyright with information in bitkeeper changelogs 2004-06-08 13:37:27 -04:00
pc_event.cc Rename sim/universe.{cc,hh} to root.{cc,hh} (since the 2005-06-01 21:59:27 -04:00
pc_event.hh pc event now clears lower 2 bits 2004-09-16 15:11:38 -04:00
static_inst.cc Rename sim/universe.{cc,hh} to root.{cc,hh} (since the 2005-06-01 21:59:27 -04:00
static_inst.hh Large update of several parts of my code. The most notable change is the inclusion of a full-fledged load/store queue. At the moment it still has some issues running, but most of the code is hopefully close to the final version. 2005-05-03 10:56:47 -04:00