Ali Saidi 4eff4fa12e cpu: add support for outputing a protobuf formatted CPU trace ... Doesn't support x86 due to static instruction representation. --HG-- rename : src/cpu/CPUTracers.py => src/cpu/InstPBTrace.py		2015-02-16 03:32:38 -05:00
..
arch	mem: Clarification of packet crossbar timings	2015-02-11 10:23:47 -05:00
base	base: Add compiler macros to add deprecation warnings	2015-02-11 10:23:24 -05:00
cpu	cpu: add support for outputing a protobuf formatted CPU trace	2015-02-16 03:32:38 -05:00
dev	mem: Clarification of packet crossbar timings	2015-02-11 10:23:47 -05:00
doc	cpu: `Minor' in-order CPU model	2014-07-23 16:09:04 -05:00
doxygen	MEM: Put memory system document into doxygen	2012-09-25 11:49:41 -05:00
kern	misc: Move AddrRangeList from port.hh to addr_range.hh	2014-10-16 05:49:59 -04:00
mem	mem: Clarification of packet crossbar timings	2015-02-11 10:23:47 -05:00
proto	cpu: add support for outputing a protobuf formatted CPU trace	2015-02-16 03:32:38 -05:00
python	base: Add XOR-based hashed address interleaving	2015-02-03 14:25:54 -05:00
sim	sim: Move the BaseTLB to src/arch/generic/	2015-02-11 10:23:27 -05:00
unittest	test: Add a unittest for the BitUnion types.	2015-01-07 00:34:40 -08:00
Doxyfile	Doxygen: Update the version of the Doxyfile	2012-10-11 06:38:42 -04:00
SConscript	base: Add compiler macros to add deprecation warnings	2015-02-11 10:23:24 -05:00