gem5/dev/isa_fake.hh
Nathan Binkert 12d903a650 io_bus is split out into pio_bus and dma_bus so that any device
can specify either independently.

python/m5/objects/Device.py:
    io_bus is split out into pio_bus and dma_bus so that any device
    can specify either independently.
    dma_bus defaults to point to whatever pio_bus uses.

--HG--
extra : convert_revision : d35d5374d0bf592f6b5df465c05203577b8b8763
2005-11-20 16:57:53 -05:00

85 lines
3.1 KiB
C++

/*
* Copyright (c) 2004-2005 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @file
* Declaration of a fake device.
*/
#ifndef __ISA_FAKE_HH__
#define __ISA_FAKE_HH__
#include "dev/tsunami.hh"
#include "base/range.hh"
#include "dev/io_device.hh"
/**
* IsaFake is a device that returns -1 on all reads and
* accepts all writes. It is meant to be placed at an address range
* so that an mcheck doesn't occur when an os probes a piece of hw
* that doesn't exist (e.g. UARTs1-3).
*/
class IsaFake : public PioDevice
{
private:
/** The address in memory that we respond to */
Addr addr;
public:
/**
* The constructor for Tsunmami Fake just registers itself with the MMU.
* @param name name of this device.
* @param a address to respond to.
* @param mmu the mmu we register with.
* @param size number of addresses to respond to
*/
IsaFake(const std::string &name, Addr a, MemoryController *mmu,
HierParams *hier, Bus *pio_bus, Addr size = 0x8);
/**
* This read always returns -1.
* @param req The memory request.
* @param data Where to put the data.
*/
virtual Fault read(MemReqPtr &req, uint8_t *data);
/**
* All writes are simply ignored.
* @param req The memory request.
* @param data the data to not write.
*/
virtual Fault write(MemReqPtr &req, const uint8_t *data);
/**
* Return how long this access will take.
* @param req the memory request to calcuate
* @return Tick when the request is done
*/
Tick cacheAccess(MemReqPtr &req);
};
#endif // __ISA_FAKE_HH__