Korey Sewell 37cd6695eb Merge zizzer:/bk/multiarch ... into zazzer.eecs.umich.edu:/z/ksewell/research/m5-sim/multiarch --HG-- rename : arch/alpha/alpha_memory.cc => arch/alpha/memory.cc rename : arch/alpha/alpha_memory.hh => arch/alpha/memory.hh extra : convert_revision : c641ba3c1009829b7276279b2dca441be1da5b30		2006-02-21 22:06:18 -05:00
..
formats	Changed Fault * to Fault, which is a typedef to FaultBase *, which is the old Fault class renamed.	2006-02-21 20:10:40 -05:00
base.isa	Renaming alpha files and changing some MIPS stuff to be more like Alpha version	2006-02-21 22:02:05 -05:00
bitfields.isa	load/store instruction format ... now generates load/store code	2006-02-20 14:30:23 -05:00
decoder.isa	load/store instruction format ... now generates load/store code	2006-02-20 14:30:23 -05:00
formats.isa	MIPS generates ISA code through scons '.../decoder.cc'!!!	2006-02-18 03:12:04 -05:00
includes.isa	name changes ... minor IntOP format change	2006-02-07 18:36:08 -05:00
main.isa	trying to get ISA to parse correctly ...	2006-02-14 21:26:01 -05:00
operands.isa	load/store instruction format ... now generates load/store code	2006-02-20 14:30:23 -05:00