MIPS generates ISA code through scons '.../decoder.cc'!!!
Now, must create g++ compilable code ...
arch/mips/isa/decoder.isa:
missing a '}' ... edited a few instruction decodings ...
arch/mips/isa/formats.isa:
rearranged #include
arch/mips/isa/formats/branch.isa:
add Branch Likely and Unconditional format
arch/mips/isa/formats/int.isa:
move OperateNopCheckDecode template to another file ...
arch/mips/isa/formats/noop.isa:
change Alpha to Mips in noop.isa
--HG--
extra : convert_revision : 4bf955fa6dffbbc99fb95fee7878f691e3df5424
This commit is contained in:
Korey Sewell
parent
7446238118
commit
6bf71f96f3
5 changed files with 594 additions and 642 deletions
File diff suppressed because it is too large
Load diff
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@ -1,9 +1,15 @@
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//Templates from this format are used later
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##include "m5/arch/mips/isa/formats/util.isa"
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// -*- mode:c++ -*-
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//Templates from this format are used later
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//Include the basic format
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##include "m5/arch/mips/isa/formats/basic.isa"
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//Include the basic format
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##include "m5/arch/mips/isa/formats/noop.isa"
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//Include utility formats/functions
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##include "m5/arch/mips/isa/formats/util.isa"
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//Include the integerOp and integerOpCc format
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##include "m5/arch/mips/isa/formats/int.isa"
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@ -19,10 +25,6 @@
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//Include the branch format
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##include "m5/arch/mips/isa/formats/branch.isa"
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//Include the noop format
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##include "m5/arch/mips/isa/formats/noop.isa"
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//Include the noop format
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##include "m5/arch/mips/isa/formats/unimp.isa"
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@ -61,8 +61,7 @@ output header {{
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};
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/**
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* Base class for branches (PC-relative control transfers),
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* conditional or unconditional.
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* Base class for branch likely branches (PC-relative control transfers),
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*/
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class BranchLikely : public PCDependentDisassembly
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{
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@ -206,14 +205,21 @@ output decoder {{
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}
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}};
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def template JumpOrBranchDecode {{
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return (RD == 0)
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? (StaticInst<MipsISA> *)new %(class_name)s(machInst)
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: (StaticInst<MipsISA> *)new %(class_name)sAndLink(machInst);
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}};
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def format Branch(code) {{
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code = 'bool cond;\n' + code + '\nif (cond) NPC = NPC + disp;\n';
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def format Branch(code,*flags) {{
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code = 'bool cond;\n' + code + '\n'
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if flags == 'IsLink':
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code += 'R31 = NPC + 8\n'
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code += '\nif (cond) NPC = NPC + disp;\n';
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iop = InstObjParams(name, Name, 'Branch', CodeBlock(code),
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('IsDirectControl', 'IsCondControl'))
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header_output = BasicDeclare.subst(iop)
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@ -222,11 +228,23 @@ def format Branch(code) {{
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exec_output = BasicExecute.subst(iop)
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}};
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def format BranchLikely(code) {{
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def format BranchLikely(code,*flags) {{
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code = 'bool cond;\n' + code + '\nif (cond) NPC = NPC + disp;\n';
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if flags == 'IsLink':
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code += 'R31 = NPC + 8\n'
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iop = InstObjParams(name, Name, 'Branch', CodeBlock(code),
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('IsDirectControl', 'IsCondControl'))
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('IsDirectControl', 'IsCondControl','IsCondDelaySlot'))
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header_output = BasicDeclare.subst(iop)
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decoder_output = BasicConstructor.subst(iop)
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decode_block = BasicDecode.subst(iop)
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exec_output = BasicExecute.subst(iop)
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}};
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def format Unconditional(code,*flags) {{
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iop = InstObjParams(name, Name, 'Jump', CodeBlock(code),
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('IsIndirectControl', 'IsUncondControl'))
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header_output = BasicDeclare.subst(iop)
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decoder_output = BasicConstructor.subst(iop)
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decode_block = BasicDecode.subst(iop)
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@ -234,16 +252,5 @@ def format BranchLikely(code) {{
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}};
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def format UncondBranch(*flags) {{
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flags += ('IsUncondControl', 'IsDirectControl')
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(header_output, decoder_output, decode_block, exec_output) = \
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UncondCtrlBase(name, Name, 'Branch', 'NPC + disp', flags)
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}};
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def format Jump(*flags) {{
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flags += ('IsUncondControl', 'IsIndirectControl')
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(header_output, decoder_output, decode_block, exec_output) = \
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UncondCtrlBase(name, Name, 'Jump', '(Rb & ~3) | (NPC & 1)', flags)
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}};
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@ -53,18 +53,6 @@ output decoder {{
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}};
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// integer & FP operate instructions use Rd as dest, so check for
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// Rd == 0 to detect nops
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def template OperateNopCheckDecode {{
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{
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MipsStaticInst *i = new %(class_name)s(machInst);
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if (RD == 0) {
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i = makeNop(i);
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}
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return i;
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}
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}};
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//Used by decoder.isa
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def format IntOp(code, *opt_flags) {{
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orig_code = code
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@ -1,50 +1,4 @@
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////////////////////////////////////////////////////////////////////
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//
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// Noop instruction
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//
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output header {{
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/**
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* Base class for integer operations.
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*/
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class Noop : public MipsStaticInst
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{
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protected:
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/// Constructor
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Noop(const char *mnem, MachInst _machInst, OpClass __opClass) : MipsStaticInst(mnem, _machInst, __opClass)
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{
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}
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std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
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};
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}};
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output decoder {{
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std::string Noop::generateDisassembly(Addr pc, const SymbolTable *symtab) const
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{
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return "Disassembly of integer instruction\n";
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}
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}};
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def template NoopExecute {{
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Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const
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{
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//Nothing to see here, move along
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return No_Fault;
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}
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}};
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// Primary format for integer operate instructions:
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def format Noop(code, *opt_flags) {{
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orig_code = code
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cblk = CodeBlock(code)
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iop = InstObjParams(name, Name, 'MipsStaticInst', cblk, opt_flags)
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header_output = BasicDeclare.subst(iop)
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decoder_output = BasicConstructor.subst(iop)
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decode_block = BasicDecodeWithMnemonic.subst(iop)
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exec_output = NoopExecute.subst(iop)
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}};
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// -*- mode:c++ -*-
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////////////////////////////////////////////////////////////////////
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//
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/**
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* Static instruction class for no-ops. This is a leaf class.
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*/
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class Nop : public AlphaStaticInst
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class Nop : public MipsStaticInst
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{
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/// Disassembly of original instruction.
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const std::string originalDisassembly;
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public:
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/// Constructor
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Nop(const std::string _originalDisassembly, MachInst _machInst)
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: AlphaStaticInst("nop", _machInst, No_OpClass),
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: MipsStaticInst("nop", _machInst, No_OpClass),
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originalDisassembly(_originalDisassembly)
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{
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flags[IsNop] = true;
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/// Helper function for decoding nops. Substitute Nop object
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/// for original inst passed in as arg (and delete latter).
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inline
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AlphaStaticInst *
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makeNop(AlphaStaticInst *inst)
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MipsStaticInst *
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makeNop(MipsStaticInst *inst)
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{
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AlphaStaticInst *nop = new Nop(inst->disassemble(0), inst->machInst);
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MipsStaticInst *nop = new Nop(inst->disassemble(0), inst->machInst);
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delete inst;
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return nop;
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}
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// Rc == 31 to detect nops
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def template OperateNopCheckDecode {{
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{
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AlphaStaticInst *i = new %(class_name)s(machInst);
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MipsStaticInst *i = new %(class_name)s(machInst);
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if (RC == 31) {
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i = makeNop(i);
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}
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// Like BasicOperate format, but generates NOP if RC/FC == 31
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def format BasicOperateWithNopCheck(code, *opt_args) {{
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iop = InstObjParams(name, Name, 'AlphaStaticInst', CodeBlock(code),
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iop = InstObjParams(name, Name, 'MipsStaticInst', CodeBlock(code),
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opt_args)
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header_output = BasicDeclare.subst(iop)
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decoder_output = BasicConstructor.subst(iop)
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