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gem5/tests/long/10.mcf/ref/x86/linux/simple-timing
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Steve Reinhardt 13a15c55a4 stats: update stats for previous cset 
Coherence protocol change basically got rid
of UpgradeReqs in L2 caches, other minor
related cache stat changes.
2010-09-21 23:07:35 -07:00
..
config.ini stats: update stats for previous cset 2010-09-21 23:07:35 -07:00
mcf.out X86: Add x86 reference output for the timing CPU. 2008-11-09 21:57:15 -08:00
simerr Update stats for new prefetching fixes. 2009-02-16 12:09:45 -05:00
simout stats: update stats for previous cset 2010-09-21 23:07:35 -07:00
stats.txt stats: update stats for previous cset 2010-09-21 23:07:35 -07:00