4eff4fa12e
Doesn't support x86 due to static instruction representation. --HG-- rename : src/cpu/CPUTracers.py => src/cpu/InstPBTrace.py
135 lines
4.8 KiB
C++
135 lines
4.8 KiB
C++
/*
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* Copyright (c) 2014 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Ali Saidi
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*/
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#ifndef __CPU_INST_PB_TRACE_HH__
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#define __CPU_INST_PB_TRACE_HH__
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#include "arch/types.hh"
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#include "base/trace.hh"
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#include "base/types.hh"
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#include "cpu/static_inst_fwd.hh"
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#include "params/InstPBTrace.hh"
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#include "proto/protoio.hh"
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#include "sim/insttracer.hh"
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class ThreadContext;
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namespace ProtoMessage {
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class Inst;
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}
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namespace Trace {
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/**
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* This in an instruction tracer that records the flow of instructions through
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* multiple cpus and systems to a protobuf file specified by proto/inst.proto
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* for further analysis.
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*/
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class InstPBTraceRecord : public InstRecord
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{
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public:
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InstPBTraceRecord(InstPBTrace& _tracer, Tick when, ThreadContext *tc,
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const StaticInstPtr si, TheISA::PCState pc,
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const StaticInstPtr mi = NULL)
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: InstRecord(when, tc, si, pc, mi), tracer(_tracer)
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{}
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/** called by the cpu when the instruction commits.
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* This implementation of dump calls InstPBTrace to output the contents to a
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* protobuf file
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*/
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void dump() M5_ATTR_OVERRIDE;
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protected:
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InstPBTrace& tracer;
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};
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class InstPBTrace : InstTracer
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{
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public:
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InstPBTrace(const InstPBTraceParams *p);
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virtual ~InstPBTrace();
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InstPBTraceRecord* getInstRecord(Tick when, ThreadContext *tc, const
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StaticInstPtr si, TheISA::PCState pc, const
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StaticInstPtr mi = NULL) M5_ATTR_OVERRIDE;
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protected:
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/** One output stream for the entire simulation.
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* We encode the CPU & system ID so all we need is a single file
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*/
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static ProtoOutputStream *traceStream;
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/** This is the message were working on writing. The majority of the message
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* exists however the memory accesses will be delayed.
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*/
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ProtoMessage::Inst *curMsg;
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/** Create the output file and write the header into it
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* @param filename the file to create (if ends with .gz it will be
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* compressed)
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*/
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void createTraceFile(std::string filename);
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/** If there is a pending message still write it out and then close the file
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*/
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void closeStreams();
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/** Write an instruction to the trace file
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* @param tc thread context for the cpu ID
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* @param si for the machInst and opClass
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* @param pc for the PC Addr
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*/
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void traceInst(ThreadContext *tc, StaticInstPtr si, TheISA::PCState pc);
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/** Write a memory request to the trace file as part of the cur instruction
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* @param si for the machInst and opClass
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* @param a address of the request
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* @param s size of the request
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* @param f flags for the request
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*/
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void traceMem(StaticInstPtr si, Addr a, Addr s, unsigned f);
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friend class InstPBTraceRecord;
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};
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} // namespace Trace
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#endif // __CPU_INST_PB_TRACE_HH__
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