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gem5/src/arch
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Lena Olson 333988a73e x86: fix debug trace output for mwait 
When running with the Exec flag, the mwait instruction attempted
to print out its source registers, which were never actually
initialized. This led to sporadic assertion failures when the
value stored there was invalid.

Committed by: Nilay Vaish <nilay@cs.wisc.edu>
2015-04-03 11:42:10 -05:00
..
alpha arch: Make readMiscRegNoEffect const throughout 2015-02-16 03:33:28 -05:00
arm arm: Share a port for the two table walker objects 2015-03-02 04:00:42 -05:00
generic sim: Move the BaseTLB to src/arch/generic/ 2015-02-11 10:23:27 -05:00
mips arch: Make readMiscRegNoEffect const throughout 2015-02-16 03:33:28 -05:00
null arch: Cleanup unused ISA traits constants 2014-09-03 07:42:21 -04:00
power arch: Make readMiscRegNoEffect const throughout 2015-02-16 03:33:28 -05:00
sparc arch: Make readMiscRegNoEffect const throughout 2015-02-16 03:33:28 -05:00
x86 x86: fix debug trace output for mwait 2015-04-03 11:42:10 -05:00
isa_parser.py arch: Allow named constants as decode case values. 2014-12-04 15:52:48 -08:00
micro_asm.py scons: add slicc and ply to sys.path and PYTHONPATH so everyone has access 2009-09-22 15:24:16 -07:00
micro_asm_test.py Add a second section to make sure the ROM is extended properly. 2007-05-31 22:21:21 +00:00
SConscript kvm, x86: Adding support for SE mode execution 2014-11-23 18:01:08 -08:00