gem5/arch
Gabe Black 2952ea7c82 Merge m5.eecs.umich.edu:/bk/newmem
into  ewok.(none):/home/gblack/m5/newmem

--HG--
extra : convert_revision : 58a5ae14fc8ac697206a3bfa1cf543a3579123d4
2006-03-10 17:01:58 -05:00
..
alpha Merge m5.eecs.umich.edu:/bk/newmem 2006-03-10 17:01:58 -05:00
mips last changes before big merge 2006-03-09 03:27:51 -05:00
sparc fix merging issues 2006-03-09 16:17:10 -05:00
isa_parser.py Changes to support automatic renaming of the shadow registers at decode time. This requires using an ExtMachInst (uint64_t) instead of the normal MachInst; the ExtMachInst is packed with extra decode context information. In the case of Alpha, the PAL mode is included. 2006-03-03 15:28:25 -05:00
isa_specific.hh Auto-generate arch/foo.hh "switch headers" in scons. 2006-02-22 22:22:06 -05:00
SConscript Pushed ev5.hh out of the non-alpha code. 2006-03-07 14:08:01 -05:00