Ali Saidi 1c5aa3f8cd make m5 panic a little more verbose ... --HG-- extra : convert_revision : 32f52d829040c06c8a62cab1a7af1ed3b453b6f9		2006-05-11 17:17:47 -04:00
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alpha	make m5 panic a little more verbose	2006-05-11 17:17:47 -04:00
mips	last changes before big merge	2006-03-09 03:27:51 -05:00
sparc	fix merging issues	2006-03-09 16:17:10 -05:00
isa_parser.py	Changes to support automatic renaming of the shadow registers at decode time. This requires using an ExtMachInst (uint64_t) instead of the normal MachInst; the ExtMachInst is packed with extra decode context information. In the case of Alpha, the PAL mode is included.	2006-03-03 15:28:25 -05:00
isa_specific.hh	Auto-generate arch/foo.hh "switch headers" in scons.	2006-02-22 22:22:06 -05:00
SConscript	Pushed ev5.hh out of the non-alpha code.	2006-03-07 14:08:01 -05:00