gem5/src/mem
2011-02-06 22:14:18 -08:00
..
cache Replace curTick global variable with accessor functions. 2011-01-07 21:50:29 -08:00
config Fixes to get prefetching working again. 2009-02-16 08:56:40 -08:00
protocol MOESI_hammer: Added full-bit directory support 2011-02-06 22:14:18 -08:00
ruby MOESI_hammer: Added full-bit directory support 2011-02-06 22:14:18 -08:00
slicc Change interface between coherence protocols and CacheMemory 2011-01-17 18:46:16 -06:00
bridge.cc Replace curTick global variable with accessor functions. 2011-01-07 21:50:29 -08:00
bridge.hh includes: use base/types.hh not inttypes.h or stdint.h 2009-05-17 14:34:51 -07:00
Bridge.py DMA: Add IOCache and fix bus bridge to optionally only send requests one 2007-08-10 16:14:01 -04:00
bus.cc Replace curTick global variable with accessor functions. 2011-01-07 21:50:29 -08:00
bus.hh bus: clean up default responder code. 2010-08-17 05:06:21 -07:00
Bus.py bus: clean up default responder code. 2010-08-17 05:06:21 -07:00
dram.cc Replace curTick global variable with accessor functions. 2011-01-07 21:50:29 -08:00
dram.hh stats: Fix all stats usages to deal with template fixes 2009-03-05 19:09:53 -08:00
mem_object.cc params: Get rid of the remnants of the old style parameter configuration stuff. 2008-08-11 12:22:17 -07:00
mem_object.hh params: Get rid of the remnants of the old style parameter configuration stuff. 2008-08-11 12:22:17 -07:00
MemObject.py Major changes to how SimObjects are created and initialized. Almost all 2007-07-23 21:51:38 -07:00
mport.cc Replace curTick global variable with accessor functions. 2011-01-07 21:50:29 -08:00
mport.hh Create a message port for sending messages as apposed to reading/writing a memory range. 2008-10-12 12:08:51 -07:00
packet.cc cache: fail SC when invalidated while waiting for bus 2010-09-09 14:40:19 -04:00
packet.hh Replace curTick global variable with accessor functions. 2011-01-07 21:50:29 -08:00
packet_access.hh arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh 2009-09-23 08:34:21 -07:00
page_table.cc Faults: Pass the StaticInst involved, if any, to a Fault's invoke method. 2010-09-13 19:26:03 -07:00
page_table.hh Faults: Pass the StaticInst involved, if any, to a Fault's invoke method. 2010-09-13 19:26:03 -07:00
physical.cc SE: Fix simulating more than 4GB of RAM in SE mode 2010-11-19 18:01:01 -06:00
physical.hh SE: Fix simulating more than 4GB of RAM in SE mode 2010-11-19 18:01:01 -06:00
PhysicalMemory.py Make default PhysicalMemory latency slightly more realistic. 2008-08-03 18:13:29 -04:00
port.cc types: clean up types, especially signed vs unsigned 2009-06-04 23:21:12 -07:00
port.hh types: clean up types, especially signed vs unsigned 2009-06-04 23:21:12 -07:00
port_impl.hh arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh 2009-09-23 08:34:21 -07:00
request.hh Replace curTick global variable with accessor functions. 2011-01-07 21:50:29 -08:00
SConscript ruby: get rid of ruby's Debug.hh 2011-01-10 11:11:20 -08:00
tport.cc Replace curTick global variable with accessor functions. 2011-01-07 21:50:29 -08:00
tport.hh Replace curTick global variable with accessor functions. 2011-01-07 21:50:29 -08:00
translating_port.cc arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh 2009-09-23 08:34:21 -07:00
translating_port.hh fix the translating ports so it can add a page on a fault 2007-05-09 15:37:46 -04:00
vport.cc arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh 2009-09-23 08:34:21 -07:00
vport.hh implement vtophys and 32bit gdb support 2007-02-18 19:57:46 -05:00