gem5/src/arch/x86/regs
Steve Reinhardt 2d91e741e8 x86: create function to check miscreg validity
In the process of trying to get rid of an '== false' comparison,
it became apparent that a slightly more involved solution was
needed.  Split this out into its own changeset since it's not
a totally trivial local change like the others.
2016-02-06 17:21:20 -08:00
..
apic.hh X86: Create a directory for files that define register indexes. 2010-08-23 16:14:24 -07:00
ccr.hh arch/x86: add support for explicit CC register file 2013-10-15 14:22:44 -04:00
float.hh gcc: Clean-up of non-C++0x compliant code, first steps 2012-03-19 06:36:09 -04:00
int.hh arch/x86: add support for explicit CC register file 2013-10-15 14:22:44 -04:00
misc.hh x86: create function to check miscreg validity 2016-02-06 17:21:20 -08:00
msr.cc x86: Expose the raw hash map of MSRs 2013-09-18 11:28:28 +02:00
msr.hh misc: Remove redundant compiler-specific defines 2015-10-12 04:07:59 -04:00
SConscript X86: Move the MSR lookup table out of the TLB and into its own file. 2011-09-23 02:42:22 -07:00
segment.hh gcc: Clean-up of non-C++0x compliant code, first steps 2012-03-19 06:36:09 -04:00