sanchayanmaity/gem5
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14 commits

Author SHA1 Message Date
Gabe Black
c6ddab95df Rename this function. 
--HG--
extra : convert_revision : 57ea1e1d3b75e35abb3310d392ec70086fff699a
 2006-11-24 14:01:18 -05:00
Gabe Black
758c780651 Moved some constants from isa_traits.hh to the reg file headers. 
--HG--
extra : convert_revision : 378b2d9791e6282539900a2261ad2275d726b4be
 2006-11-22 23:49:44 -05:00
Gabe Black
b4a31cb8b5 Make sure only real bits of pstate can be set. 
--HG--
extra : convert_revision : 8707bbed2aeb80613f86503e92b63853767adaa9
 2006-11-20 18:08:50 -05:00
Gabe Black
cd5b33b9ff Fixes for SPARC_FS 
configs/common/FSConfig.py:
    Make a SPARC system create an IO bus.
src/python/m5/objects/T1000.py:
    Create a T1000 platform
src/arch/sparc/miscregfile.cc:
    Initialize the strand status register to the value legion provides.
src/cpu/exetrace.cc:
    Truncate an ExtMachInst to a MachInst before comparing with Legion.

--HG--
extra : convert_revision : e4189b572a5297e8362f5bd26d87b74736c8e5f1
 2006-11-16 12:34:10 -05:00
Gabe Black
20730b790c Set hpstate to be what I'm assuming Legion is. 
--HG--
extra : convert_revision : 0be66513cb0cff07c0c2b50c97c1ea74d52b0dc9
 2006-11-14 01:30:34 -05:00
Gabe Black
71dc49c785 The reset function of the MiscRegFile really resets it now. This function is called from the class's constructor. 
--HG--
extra : convert_revision : 4e7a40ffe0a9a71fd1b2b171d9c0dcac50e1a1fe
 2006-11-10 04:33:41 -05:00
Gabe Black
4aea5deccb Fix up instructions to read and write control registers, and got rid of the control register fields which won't work on a big endian host. 
--HG--
extra : convert_revision : 1b518873b6e1a073b58cbe27642537d5ae3a604d
 2006-11-10 04:02:39 -05:00
Gabe Black
601822c6b5 Make things compile in SE again. 
--HG--
extra : convert_revision : cf7faf5001b31d61c61ddce2386d61c919075800
 2006-11-03 14:42:12 -05:00
Gabe Black
694323b7c4 Move around misc reg code 
src/arch/sparc/faults.cc:
    Moved some code here from miscregfile.cc
src/arch/sparc/miscregfile.cc:
    Moved code from here to faults.cc, and merged (read|set)MiscRegWithEffect and it's FS version from ua2005.cc
src/arch/sparc/miscregfile.hh:
    readFSRegWithEffect is no longer a seperate function, and is instead done in the main readRegWith Effect.

--HG--
extra : convert_revision : 0b45f0f78e83929b32ddd2f443c8b1dbf9bc04fb
 2006-11-03 10:54:34 -05:00
Gabe Black
2b11b47357 Adjustments for the AlphaTLB changing to AlphaISA::TLB and changing register file functions to not take faults 
--HG--
extra : convert_revision : 1cef0734462ee2e4db12482462c2ab3c134d3675
 2006-11-01 16:44:45 -05:00
Gabe Black
944bfde6b3 Clean up MiscRegFile 
--HG--
extra : convert_revision : 3bc792596c99df3a5c2c82da58b801a63ccf6ddb
 2006-10-27 01:36:42 -04:00
Gabe Black
2cb190d1e3 Reorganized the MiscRegFile 
--HG--
extra : convert_revision : 088112c9b8a4ea09c8015da5a0b65ed2fc9398d2
 2006-10-26 22:48:02 -04:00
Gabe Black
e441be1b82 Change the default function from setMiscRegWithEffect to setMiscReg 
--HG--
extra : convert_revision : bedf422d51a52b009390b1e94f5330f752be2b87
 2006-10-26 20:22:23 -04:00
Gabe Black
800e6ecc07 Pushed most of constants.hh back into isa_traits.hh and regfile.hh and created a seperate file for the syscallreturn class. 
--HG--
extra : convert_revision : 9507ea1c09fda959f00aec9ec8ffb887ec8dd0f9
 2006-08-11 19:43:10 -04:00