Commit graph

84 commits

Author SHA1 Message Date
Erik Hallnor
1d09cd71a4 Reenable functioning copies.
arch/alpha/isa_desc:
    Reenable copies.

--HG--
extra : convert_revision : 99259c0ff65e742e617cba1c14f5d1bf4be2fee8
2004-03-04 20:03:38 -05:00
Erik Hallnor
8ad803058f Automerged
--HG--
extra : convert_revision : 7b56535ee32551f27db8d98172159f63e5099835
2004-03-04 15:06:34 -05:00
Erik Hallnor
7c089b2001 Copy implementations
arch/alpha/isa_desc:
    Need to return fault for copy operations.
cpu/exec_context.hh:
    Add temporary storage to pass source address from copy load to copy store
cpu/simple_cpu/simple_cpu.cc:
    Implement copy functions.
cpu/simple_cpu/simple_cpu.hh:
    Return fault

--HG--
extra : convert_revision : 98e5ce563449d6057ba45c70eece9235f1649a90
2004-03-04 14:57:57 -05:00
Erik Hallnor
cbc42f1d71 Remove copys from isa_desc, and implement a store and forward bus bridge
arch/alpha/isa_desc:
    Just to make sure, remove the new copy instructions until everything works.

--HG--
extra : convert_revision : cdd3d4c8fa415175aaee04f4a99340dcf82dbc3a
2004-02-29 22:41:11 -05:00
Nathan Binkert
27960f6d85 fix rpcc
arch/alpha/ev5.cc:
    actually implement the cycle count register
arch/alpha/isa_desc:
    the rpcc instruction really just reads the cycle count
    register

--HG--
extra : convert_revision : a0edec85672377a62b90950efc17b62b375220b1
2004-02-29 14:54:52 -05:00
Steve Reinhardt
c79deda8cd Fix handling of rpcc in full-system mode.
arch/alpha/ev5.cc:
    Handle writing IPR_CC and IPR_CC_CTL slightly more intelligently.
    (Very slightly).
arch/alpha/isa_desc:
    Upper half of rpcc result comes from value written
    to IPR_CC, not actual cycle counter.

--HG--
extra : convert_revision : 7161989db8a3f040d0558e2e5a1a162ed1cb4125
2004-02-28 17:21:32 -05:00
Erik Hallnor
cfb6f8fd01 Added copy instructions to the ISA. Well it didn't break anything yet...
arch/alpha/isa_desc:
    Add copy_load and copy_store insts (ldf and stf respectively)
cpu/simple_cpu/simple_cpu.hh:
    Add copy functions to SimpleCPU as well

--HG--
extra : convert_revision : 1fa041da582b418c47d4eefc22dabba978a50e2d
2004-02-27 02:40:43 -05:00
Erik Hallnor
c3784e37ce Initial copy support in the pipeline. Add copypal counting.
arch/alpha/osfpal.cc:
    Add a string for copypal.
arch/alpha/osfpal.hh:
    Add a code for copypal.
cpu/static_inst.hh:
    Add an IsCopy flag.

--HG--
extra : convert_revision : 19e3d90368454806029ad492eace19cd0924fe9f
2004-02-27 00:45:21 -05:00
Steve Reinhardt
6f5e104fc5 Make SW prefetch flag a parameter again, and add code to make
it actually do something on FullCPU.  Still disabled, as it
causes detailed-boot to hang when you turn it on.

arch/alpha/isa_desc:
    Add EAComp and MemAcc pseudo-instructions to prefetch StaticInst.
cpu/simple_cpu/simple_cpu.hh:
    Changed prefetch() return type from Fault to void.

--HG--
extra : convert_revision : c7cb42682bfea6af117c87d4dfdb06176b6fe6b7
2004-02-26 07:05:36 -08:00
Andrew Schultz
12747d3084 Change the physical memory logic, and also add misspeculation fix to
tlb index calls that are called from ExecContext::readIpr

arch/alpha/ev5.cc:
    Fix misspeculation bugs for misspeculated IPR accesses

--HG--
extra : convert_revision : c9ffcf9ef8123dfcaee1606c05aee8ad60d893d7
2004-02-18 21:38:55 -05:00
Andrew Schultz
a73e263f94 Change logic for translating a memory addresses, extra checks for invalid
physical addresses.

--HG--
extra : convert_revision : efb4a5229d88cb3c024e0b24f5916048bd42d589
2004-02-16 21:56:38 -05:00
Nathan Binkert
8232c9743d fix up vtophys a bit
arch/alpha/vtophys.cc:
    fix up vtophys to deal with translations if there
    is no ptbr, and to deal with PAL addresses
    add ptomem which is just a wrapper for dma_addr
arch/alpha/vtophys.hh:
    add ptomem which is a wrapper for dma_addr with the
    same usage as vtomem

--HG--
extra : convert_revision : 1ae22073d400e87b708a4a7ef501124227fc6c39
2004-02-13 15:36:21 -05:00
Steve Reinhardt
5e82f8d84c Merge zizzer:/bk/m5 into isabel.reinhardt.house:/z/stever/bk/m5
--HG--
extra : convert_revision : 964126edcf72faf572a9272599264ba2f5cd7aa1
2004-02-10 21:44:08 -08:00
Steve Reinhardt
d38f995aee Fixes for Linux syscall emulation.
arch/alpha/alpha_linux_process.cc:
    Fixes for Linux emulation:
    - stat struct alignment
    - osf_{get,set}sysinfo return values
    - additional syscall numbers
    - initialize $r0 to 0
sim/syscall_emul.cc:
    brk(0) just returns brk value (don't update it!)

--HG--
extra : convert_revision : 78e22458321c81e81540d101c9e65e2e4b0ad117
2004-02-10 21:43:57 -08:00
Nathan Binkert
087334bfe5 Merge zizzer.eecs.umich.edu:/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/.automount/ziff/z/binkertn/research/m5/memory

--HG--
extra : convert_revision : 9f385ee5b6958373a9a1bc600eb3e5e8b7987f38
2004-02-09 10:36:32 -05:00
Nathan Binkert
411d5497fa Add that one IPR memory space address that we keep seeing
--HG--
extra : convert_revision : 81b365ac9ca8b33cae99107e5b1900f7c46f0866
2004-02-09 09:06:20 -05:00
Steve Reinhardt
730296f7f9 Results of automatic (yet incomplete) merge.
--HG--
extra : convert_revision : 3ad9a929051bfe111a1e10618c8595acbbade542
2004-02-09 00:30:16 -08:00
Steve Reinhardt
d7b7363444 Add support for memory barriers.
arch/alpha/isa_desc:
    Add cache port bindings for mb & wmb.

--HG--
extra : convert_revision : 72f76150fe471d0dc97bd41598cad4d86a035e39
2004-02-09 00:22:43 -08:00
David Oehmke
95c248c213 Modify the emulated system calls to support running the SPEC Int
benchmarks for alpha-linux.

arch/alpha/alpha_linux_process.cc:
    Added some more ioctl commands to ignore.
    Set unlink and rename to the new functions.
    Ignore setrlimit, times and rt_sigaction.
    Should eventually provide a function for times.
arch/alpha/alpha_tru64_process.cc:
    Added some more ioctl commands to ignore.
    Set unlink and rename to the new functions.
    Ignore setrlimit.
sim/syscall_emul.cc:
    Added implementations for unlink and rename.
sim/syscall_emul.hh:
    Added unlink and rename functions.
    Added a couple more ioctl requests to ignore.
    Print out the PC of any ioctl commands that fail.

--HG--
extra : convert_revision : 8af21c7fa7d0645d3f9324c9ce70ad33590c3c8e
2004-02-05 12:16:17 -05:00
Steve Reinhardt
b6ff600bca Add support for "serializing" instructions that flush
execution pipeline (Alpha trapb & excb).

Add support for write memory barriers (mostly impacts
store buffer).

Add StaticInst flag to indicate memory barriers, though
this is not modeled in the pipeline yet.

arch/alpha/isa_desc:
    Implement trapb, excb, mb, and wmb as insts with
    no execution effect (empty execute() function) but
    with flags that indicate their side effects.

    Also make sure every instruction that needs to go to
    the execute stage has a real opClass value, since we
    are now using No_OpClass to signal insts that can get
    dropped at dispatch.

    StaticInst::branchTarget() is now a const method.
cpu/static_inst.hh:
    Add flags to indicate serializing insts (trapb, excb) and
    memory and write barriers.

    Also declare some StaticInst methods as const methods.
dev/etherlink.hh:
sim/eventq.hh:
sim/serialize.cc:
sim/serialize.hh:
sim/sim_object.hh:
    Make name() return value const.

--HG--
extra : convert_revision : 39520e71469fa20e0a7446b2e06b494eec17a02c
2004-02-04 21:42:00 -08:00
Steve Reinhardt
3e5070a3f1 Fix bug: forgot branchTarget() method on indirect branches.
arch/alpha/isa_desc:
    Add missing branchTarget() method for indirect branches.
cpu/static_inst.hh:
    Add comment clarifying when branchTarget() can be used
    on indirect branches.

--HG--
extra : convert_revision : 0dcfb36a9792a338cefceb3d1501825abace7ac5
2004-02-03 07:19:05 -08:00
Steve Reinhardt
7b07b0877f Change MemReqPtr parameters to references.
This avoids incrementing and decrementing the MemReq
reference counters on every call and return.

arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
cpu/exec_context.hh:
cpu/memtest/memtest.cc:
cpu/memtest/memtest.hh:
dev/alpha_console.cc:
dev/alpha_console.hh:
    Change MemReqPtr parameters to references.

--HG--
extra : convert_revision : 3ba18bdd9f996563988402576bfdd3430e1ab1e5
2004-02-02 10:47:21 -08:00
Nathan Binkert
801c46d250 a bunch of warning fixes
arch/alpha/isa_desc:
    don't say warn: Warning:
base/misc.cc:
    avoid printing two newlines in a row
sim/main.cc:
    print out a message just before we enter the event queue

--HG--
extra : convert_revision : 2a824d4b67661903fc739a0fb0759aa91d72382c
2004-01-27 17:56:23 -05:00
Erik Hallnor
003d2d724c Merge ehallnor@zizzer:/bk/m5 into zazzer.eecs.umich.edu:/z/ehallnor/m5
--HG--
extra : convert_revision : 52437e42f15899db46525ad91b2e43c2a96ace36
2004-01-13 02:10:48 -05:00
Erik Hallnor
413bfc68e6 Change to a new centralized way to specify the memory hierarchy parameters (do_data and do_events). If you use the defaults (false and true respectively) you don't have to change your INI files.
arch/alpha/isa_traits.hh:
    Add a constant for the maximum address value called MaxAddr.

--HG--
extra : convert_revision : 1371e8b713cc6ed134093e9c208db35dc9741ac7
2004-01-13 02:10:35 -05:00
Steve Reinhardt
510eef0fa0 Modify handling of serialize:dir parameter to make it more useful.
Move global checkpoint-related functions and vars into Checkpoint class (as statics).

arch/alpha/pseudo_inst.cc:
dev/disk_image.cc:
    Move global checkpoint-related functions and vars
    into Checkpoint class (as statics).
sim/serialize.cc:
    Move global checkpoint-related functions and vars
    into Checkpoint class (as statics).

    Checkpoint constructor now takes checkpoint directory name instead
    of file name.

    Make serialize:dir parameter actually set checkpoint directory name
    instead of directory in which checkpoint directory is created.  If
    the value contains a '%', the curTick value is sprintf'd into the
    format to create the directory name.  The default is backwards compatible
    with the old fixed name ("m5.%012d").
sim/serialize.hh:
    Move global checkpoint-related functions and vars
    into Checkpoint class (as statics).

    Checkpoint constructor now takes checkpoint directory name instead
    of file name.

--HG--
extra : convert_revision : d0aa87b62911f405a4f5811271b9e6351fdd9fe4
2004-01-11 15:24:18 -08:00
Nathan Binkert
255ac8372d Make stuff build on openbsd
arch/alpha/alpha_tru64_process.cc:
    So, I don't know why linux uses an off_t here.
    I'm also not sure why linux defines an off_t to be a long
    Let's just use long here since it works for linux, and that's
    what bsd does
base/inifile.cc:
    correct #include for OpenBSD
dev/disk_image.cc:
    the correct type for this is streampos

--HG--
extra : convert_revision : f3ac3a3b8515d66e07ffb9780d8a9e387297b6a0
2003-12-19 00:02:20 -05:00
Steve Reinhardt
16021aa436 Fix previously committed call_pal fix... the main problem was in the
makefile, such that decoder.cc was not getting rebuilt.
Also add -fno-strict-aliasing to fix all the bizarre problems
I've been having with g++ 3.3.x.

arch/alpha/isa_desc:
    Fix compilation problems.  AlphaISA is a class now, not a namespace.

--HG--
extra : convert_revision : 1583cebc1258c57cbd286c1955d11648150fa1f4
2003-12-16 11:46:52 -08:00
Steve Reinhardt
2cd5e980d2 Fixes for full-system call_pal instruction.
arch/alpha/alpha_memory.cc:
    Rename md_mode_type to mode_type.
arch/alpha/ev5.cc:
    simPalCheck() only gets called on correct path now, so
    there's no need to test misspeculating().
arch/alpha/isa_desc:
    Get privileged call_pall detection right this time (I hope).
    ExecContext::simPalCheck() and Annotate::Callpal() are now
    called only on non-speculative executions... this should fix
    the bogus pal-call stats we've been seeing (since these are
    incremented in simPalCheck()).
    Also check for invalid call_pall function codes.

--HG--
extra : convert_revision : 465d6724884007d3fa066d14cd5e6db0cd3954e1
2003-12-15 21:06:09 -08:00
Steve Reinhardt
777c1ebfab Stats & serialization tweaks & cleanup. Unserializing from
a checkpoint now gives identical results to running from scratch
and doing at switchover at the same cycle!
- CPUs start at cycle 0 again, not cycle 1.
- curTick is now serialized & unserialized.
- Stats get reset in main (before event loop).  Since this is done
after curTick is unserialized, simTicks gets set correctly for
running from a checkpoint.
- Simplify serialization to happen in a single pass.
- s/Serializeable/Serializable/

arch/alpha/isa_traits.hh:
dev/etherlink.hh:
sim/eventq.cc:
sim/eventq.hh:
    s/Serializeable/Serializable/
kern/tru64/tru64_system.cc:
sim/process.cc:
    Make initial CPU activation on cycle 0 again (not 1).
sim/main.cc:
    Reset stats before getting started.
    Make error message on falling out of event loop
    more meaningful.
sim/serialize.cc:
sim/serialize.hh:
    Get rid of now-useless initial pass; serialization is
    done in a single pass now.
    Serialize & unserialize curTick.
    Wrap curTick and mainEventQueue in a "globals" Serializable object.
    s/Serializeable/Serializable/
sim/sim_object.cc:
    Add static function to serialize all SimObjects.
sim/sim_object.hh:
    Add static function to serialize all SimObjects.
    s/Serializeable/Serializable/

--HG--
extra : convert_revision : 9dcc411d0009b54b8eb61c3a509680b81b9f6f68
2003-12-11 00:16:46 -08:00
Steve Reinhardt
4ce6118fda Factor ExecContext::setStatus(), BaseCPU::execCtxStatusChange(),
and SimpleCPU::setStatus() into separate functions.  For example,
setStatus(Active) is now activate().

--HG--
extra : convert_revision : 4392e07caf6c918db0b535f613175109681686fe
2003-12-10 17:47:28 -08:00
Steve Reinhardt
f13509e968 Generate a fault when a privileged PAL call is
executed in non-privileged (non-PAL) mode.

--HG--
extra : convert_revision : c8823a1eec27d801a1ed6110ade07354c4dd2a32
2003-12-09 14:19:35 -08:00
Steve Reinhardt
9984b2bd6c Formatting & doxygen docs for new syscall emulation code.
arch/alpha/alpha_linux_process.cc:
arch/alpha/alpha_linux_process.hh:
arch/alpha/alpha_tru64_process.cc:
arch/alpha/alpha_tru64_process.hh:
sim/syscall_emul.cc:
sim/syscall_emul.hh:
    Formatting & doxygen.

--HG--
extra : convert_revision : 4f07dd37e254120800dd0d5c0eb47acc9c00cb3f
2003-12-01 22:39:27 -08:00
Steve Reinhardt
7976794aad Restructuring of LiveProcess etc. to support multiple emulated OS syscall
interfaces, and specific support for Alpha Linux.  Split syscall emulation
functions into several groups, based on whether they depend on the specific
OS and/or architecture (and all combinations of above), including the use of
template functions to support syscalls with slightly different constants
or interface structs.

arch/alpha/alpha_tru64_process.cc:
    Incorporate full Tru64 object definition here, including structure and constant definitions.
    This way we can wrap all of the functions inside the object, and not worry about namespace
    conflicts because no one outside this file will ever see it.
base/loader/aout_object.cc:
base/loader/aout_object.hh:
base/loader/ecoff_object.cc:
base/loader/ecoff_object.hh:
base/loader/elf_object.cc:
base/loader/elf_object.hh:
base/loader/object_file.cc:
base/loader/object_file.hh:
    Add enums to ObjectFile to indicate the object's architecture and operating system.
cpu/exec_context.cc:
    prog.hh is now process.hh
cpu/exec_context.hh:
    prog.hh is now process.hh
    move architecture-specific syscall arg accessors into ExecContext
cpu/simple_cpu/simple_cpu.cc:
    No need to include prog.hh (which has been renamed)
sim/process.cc:
sim/process.hh:
    LiveProcess is now effectively an abstract base class.
    New LiveProcess::create() function takes an object file and dynamically picks the
    appropriate subclass of LiveProcess to handle the syscall interface that file expects
    (currently Tru64 or Linux).

--HG--
rename : arch/alpha/fake_syscall.cc => arch/alpha/alpha_tru64_process.cc
rename : sim/prog.cc => sim/process.cc
rename : sim/prog.hh => sim/process.hh
extra : convert_revision : 4a03ca7d94a34177cb672931f8aae83a6bad179a
2003-12-01 19:34:38 -08:00
Steve Reinhardt
0a7f82da7d Rewrite getdirentries to replace SS-derived version.
--HG--
extra : convert_revision : 72eced315bbb331d3068279e60f1f0a390eb687a
2003-11-12 08:40:32 -08:00
Nathan Binkert
7f7dcf4e1f add a couple of hacks to get thigns going for ISCA
arch/alpha/pseudo_inst.hh:
    Give temporary access of these functions to full cpu junk
    (this is a hack!)

--HG--
extra : convert_revision : 35499d6bf03b1c21dc918ccc09a6d21719262120
2003-11-07 05:06:22 -05:00
Steve Reinhardt
e4b52476bc Automerge
--HG--
extra : convert_revision : 2ca18ecbf04a1de72391073d0a5309fdbbdfefda
2003-11-03 20:35:05 -08:00
Steve Reinhardt
02795babaf Fix bugs in and expand syscall emulation code.
arch/alpha/fake_syscall.cc:
    Fix a couple of bugs:
    - error return codes weren't making it through due to inadvertent cast to unsigned
    - sigreturn broken in not one but two ways
    - make all file descriptors look like plain files (not ttys)
    Added implementations of setuid, getgid, fcntl, and getdirentries from Dave Oehmke

--HG--
extra : convert_revision : 53d3f13e1b05e3bde9e68ada3774ca39fa4c0d4c
2003-11-03 20:31:15 -08:00
Steve Reinhardt
40b9a3878a Minor changes to instruction trace output.
arch/alpha/isa_desc:
    A few disassembly changes to make it easier to compare with old machine.def traces:
    - Make lds prefetches print f31 instead of r31 as dest.
    - Don't print mode suffixes on FP if SS_COMPATIBLE_DISASSEMBLY
cpu/exetrace.cc:
    Left-justify instruction in field, and increase width by 1.

--HG--
extra : convert_revision : 9ffd56728f1bb772aa3ccda5f027b93d4c3a4135
2003-11-03 20:26:51 -08:00
Nathan Binkert
c55e6b495e Make it so the quiesce instruction is conditionally enabled
arch/alpha/isa_desc:
    move the quiesce instruction out of here so I can conditionally
    enable it.
arch/alpha/pseudo_inst.cc:
    conditionally enable quiesce
arch/alpha/pseudo_inst.hh:
    add quiesce

--HG--
extra : convert_revision : e1c474c4bf8761ff58073785d82b2bec9f632885
2003-11-03 16:47:08 -05:00
Nathan Binkert
491fb95919 ok, let's get this right
arch/alpha/pseudo_inst.cc:
    yes is not a real value, use true

--HG--
extra : convert_revision : 30b998ae6f13641d70c9158777a12b00df8742fe
2003-11-02 22:12:20 -05:00
Nathan Binkert
c307c22257 Fix a bug in the pseudo instruction context
arch/alpha/pseudo_inst.cc:
    Don't forget the descriptions

--HG--
extra : convert_revision : f208ea24d5b34283e962916cb4c7dff976406285
2003-11-02 21:58:23 -05:00
Nathan Binkert
136ee73a58 Add the option to ignore some of the pseudo instructions
--HG--
extra : convert_revision : 2010782749ca9c5dd029f71480956b8a1fa96394
2003-11-02 20:52:40 -05:00
Nathan Binkert
d76445f9f3 Move the m5 pseudo instructions into their own file
arch/alpha/isa_desc:
    Move the pseudo instructions out of the isa_desc, into their own
    file and call out to them when they're to be accessed
sim/sim_events.cc:
sim/sim_events.hh:
sim/sim_exit.hh:
    move SimExit to sim_exit.cc

--HG--
extra : convert_revision : 1c393adb1c18bd0fef065057d7f4e9cf60ac4197
2003-11-02 20:43:39 -05:00
Nathan Binkert
667cbb6690 Implement more m5 pseduo opcodes:
resetstats
dumpstats
dumpresetstats
m5checkpoint

Lots of cleanup of serialization and stats dumping/resetting to
work with these new instructions

arch/alpha/isa_desc:
    Implement more m5 pseduo opcodes:
    resetstats
    dumpstats
    dumpresetstats
    m5checkpoint

    All of these functions take two optional parameters, the first is a delay,
    and the second is a period.  The delay tells the simulator to wait the
    specified number of nanoseconds before triggering the event, the period
    tells the simulator to repeat the event with a specified frequency
base/statistics.cc:
base/statistics.hh:
    regReset RegResetCallback
dev/disk_image.cc:
    serializeFilename -> CheckpointFile()
sim/debug.cc:
    Move this debugging statement to sim_stats.cc
sim/eventq.cc:
    Don't AutoDelete an event if it is scheduled since the process()
    function could potentially schedule the event again.
sim/main.cc:
    DumpStatsEvent is now Statistics::SetupEvent(Dump, curTick)
sim/serialize.cc:
    Change the serialize event so that it's possible to cause the
    event to repeat.  Also make the priority such that the event
    happens just before the simulator would exit if both events
    were scheduled for the same cycle.

    get rid of the serializeFilename variable and provide a CheckpointFile()
    function.  This function takes a basename that is set in the
    configuration, and appends the current cycle to the name so that
    multiple checkpoints can be dumped from the same simulation.

    Also, don't exit the simulation when a checkpoint file is dumped.
sim/serialize.hh:
    serializeFilename -> CheckpointFile()
    SetupCheckpoint function to tell the simulator to prepare
    to checkpoint at a certain time with a certain period
sim/sim_events.cc:
    DumpStatsEvent stuff gets move to sim_stats.(cc|hh)
    The context stuff gets moved into the already existing
    stats context in stat_context.cc
sim/sim_events.hh:
    DumpStatsEvent stuff gets move to sim_stats.(cc|hh)
sim/universe.cc:
    Provide some simple functions for converting times into
    ticks.  These use floating point math to get as close as
    possible to the real values.  Multipliers are set up ahead
    of time

--HG--
extra : convert_revision : d06ef26a9237529a1e5060cb1ac2dcc04d4ec252
2003-11-02 18:02:58 -05:00
Nathan Binkert
780b3b4bcd SimExit takes a time now
arch/alpha/isa_desc:
    regen

--HG--
extra : convert_revision : a9da9d2a5fc8a0414491e437747cde48dfb61a20
2003-11-02 13:01:08 -05:00
Nathan Binkert
c7d6745b07 deprecate the m5exit instruction and rename it to m5exit_old
Implement a new m5exit instruction with an optional delay

arch/alpha/isa_desc:
    move m5exit to m5exit old.  The old version of the
    instruction is now deprecated

    Implement the new exit instruction with the optional delay
sim/sim_events.cc:
sim/sim_events.hh:
    Make SimExit take a cycle
sim/universe.cc:
    provide ticksPerMS, ticksPerUS, and ticksPerNS so we don't
    have to do math during the cycle

--HG--
extra : convert_revision : e2ed47a2e5cfcd57c82086c6fcb4a28bf801c214
2003-11-02 02:07:31 -05:00
Steve Reinhardt
5a1eb9049d Support for Serializable non-SimObject things like events.
Can now serialize & unserialize DmaRequestEvents and DmaTransferEvents.
Also support serialize/unserialize of pointers to SimObjects and
other Serializable objects.

arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/isa_traits.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/simple_cpu/simple_cpu.hh:
dev/alpha_access.h:
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/console.cc:
dev/console.hh:
    unserialize() now takes a Checkpoint* instead of an IniFile*.
cpu/simple_cpu/simple_cpu.cc:
    unserialize() now takes a Checkpoint* instead of an IniFile*.
    Put ExecContext in its own section so its _status fields doesn't conflict.
sim/eventq.cc:
sim/eventq.hh:
    unserialize() now takes a Checkpoint* instead of an IniFile*.
    Events get serialized by the event queue only if they're marked
    as AutoSerialize... others are assumed to be serialized by something
    else (e.g. an owning SimObject) or to not matter.
sim/param.cc:
    Shift 'const' in case T is a ptr type.
sim/serialize.cc:
sim/serialize.hh:
    Define Checkpoint object to encapsulate everything you need to know
    about a checkpoint.  Use it to allow lookups of named Serializable
    objects (and SimObjects) during unserialization.
    unserialize() now takes a Checkpoint* instead of an IniFile*.

--HG--
extra : convert_revision : 8e6baab32405f8f548bb67a097b2f713296537a5
2003-10-29 21:45:39 -08:00
Steve Reinhardt
af5277a678 Serialization support for Alpha TLBs, PhysicalMemory, and SimpleCPU.
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
    Serialize TLB contents.
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
    Complete serialization of SimpleCPU (including owned events).
sim/eventq.cc:
sim/eventq.hh:
    Basic serialization for events.
    Still need to handle dynamic events (not owned by a SimObject).
sim/serialize.cc:
sim/serialize.hh:
    Export serialization filename so PhysicalMemory can
    derive its filename from that.

--HG--
extra : convert_revision : 4db851c5880f73f576ca092d5e5ad4256048eb51
2003-10-29 13:35:07 -08:00
Steve Reinhardt
8da9fcdd75 Flesh out ExecContext serialize/unserialize (including RegFile).
Add support for serializing enums.

arch/alpha/isa_traits.hh:
    Add serialize/unserialize functions for RegFile
    (defined in new isa_traits.cc).
cpu/exec_context.cc:
    Flesh out serialize/unserialize.
sim/serialize.hh:
    Add {UN}SERIALIZE_ENUM().

--HG--
extra : convert_revision : 9e30c7e7b3b290dc8ea0888ba3636fc93ee89052
2003-10-29 08:50:25 -08:00