Commit graph

1513 commits

Author SHA1 Message Date
Gabe Black
c432588981 Merge zizzer.eecs.umich.edu:/bk/newmem
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

src/cpu/simple/base.cc:
    Hand merge

--HG--
extra : convert_revision : a2902ef9d917d22ffb9c7dfa2fd444694a65240d
2007-05-31 20:45:04 +00:00
Vincentius Robby
83aa742d26 Merge zizzer:/bk/newmem
into  zamp.eecs.umich.edu:/.automount/greenville/w/acolyte/newmem

--HG--
extra : convert_revision : c80b7ef5a2cc4ab1b86bb1eef7fae91886a7737d
2007-05-31 16:02:31 -04:00
Vincentius Robby
ecf1eb7248 Assign traceData to be NULL at BaseSimpleCPU constructor.
Initialize a temporary variable for thread->readPC() at setupFetchRequest() to reduce function calls.
exec tracing isn't needed for m5.fast binaries
Moved MISCREG_GL, MISCREG_CWP, and MISCREG_TLB_DATA out of switch statement and use if blocks instead.

src/arch/sparc/miscregfile.cc:
    Moved MISCREG_GL, MISCREG_CWP, and MISCREG_TLB_DATA out of switch statement and use if blocks instead.
src/cpu/simple/base.cc:
    Assign traceData to be NULL at BaseSimpleCPU constructor.
    Initialize a temporary variable for thread->readPC() at setupFetchRequest() to reduce function calls.
    exec tracing isn't needed for m5.fast binaries

--HG--
extra : convert_revision : 5dc92fff05c9bde994f1e0f1bb40e11c44eb72c6
2007-05-31 16:01:41 -04:00
Gabe Black
62fde97bb2 Early micro assembler
src/arch/micro_asm.py:
    Micro assembler
src/arch/micro_asm_test.py:
    Test script for the micro assembler. This probably should go somewhere else eventually.

--HG--
extra : convert_revision : 277fdadec94763ae657f55f501704693b81e0015
2007-05-31 13:52:48 +00:00
Gabe Black
7860c045e2 x86 work that hadn't been checked in.
src/arch/x86/isa/decoder/one_byte_opcodes.isa:
    Give the "MOV" instruction the format of it's arguments. This will likely need to be completely overhauled in the near future.
src/arch/x86/predecoder.cc:
src/arch/x86/predecoder.hh:
    Make the predecoder explicitly reset itself rather than counting on it happening naturally.
src/arch/x86/predecoder_tables.cc:
    Fix the immediate size table
src/arch/x86/regfile.cc:
    nextnpc is bogus

--HG--
extra : convert_revision : 0926701fedaab41817e64bb05410a25174484a5a
2007-05-31 13:50:35 +00:00
Nathan Binkert
7797a239cc Fix cut-n-pasto to make the path correct
--HG--
extra : convert_revision : a6194cc9c3b2eb83dc8480ed0417b2246f07b4bd
2007-05-30 17:19:20 -07:00
Steve Reinhardt
4e65d2678d tport.cc:
Oops... forgot to update call site after changing
function argument semantics.

src/mem/tport.cc:
    Oops... forgot to update call site after changing
    function argument semantics.

--HG--
extra : convert_revision : 9234b991dc678f062d268ace73c71b3d13dd17dc
2007-05-30 01:53:28 -04:00
Steve Reinhardt
365e4ac374 A little more cleanup & refactoring of SimpleTimingPort.
Make it a better base class for cache ports.

--HG--
extra : convert_revision : 37d6de11545a68c1a7d11ce33fe5971c51434ee4
2007-05-29 22:23:41 -07:00
Steve Reinhardt
41f6cbce9a Restructure SimpleTimingPort a bit:
- factor out checkFunctional() code so it can be
called from derived classes
- use EventWrapper for sendEvent, move event handling
code from event to port where it belongs
- make sendEvent a pointer so derived classes can
override it
- replace std::pair with new class for readability

--HG--
extra : convert_revision : 5709de2daacfb751a440144ecaab5f9fc02e6b7a
2007-05-28 08:11:43 -07:00
Steve Reinhardt
04ac944920 Reformat comments to meet line length restriction.
--HG--
extra : convert_revision : 24c00ec4904d9fb4d6e39521e0ff8b8f60d60f6a
2007-05-28 08:04:33 -07:00
Steve Reinhardt
07bda077f2 Remove unnecessary include of physical.hh.
--HG--
extra : convert_revision : bccafe884e58a55b02ff408448e6644196e439a4
2007-05-28 08:03:13 -07:00
Nathan Binkert
35147170f9 Move SimObject python files alongside the C++ and fix
the SConscript files so that only the objects that are
actually available in a given build are compiled in.
Remove a bunch of files that aren't used anymore.

--HG--
rename : src/python/m5/objects/AlphaTLB.py => src/arch/alpha/AlphaTLB.py
rename : src/python/m5/objects/SparcTLB.py => src/arch/sparc/SparcTLB.py
rename : src/python/m5/objects/BaseCPU.py => src/cpu/BaseCPU.py
rename : src/python/m5/objects/FuncUnit.py => src/cpu/FuncUnit.py
rename : src/python/m5/objects/IntrControl.py => src/cpu/IntrControl.py
rename : src/python/m5/objects/MemTest.py => src/cpu/memtest/MemTest.py
rename : src/python/m5/objects/FUPool.py => src/cpu/o3/FUPool.py
rename : src/python/m5/objects/FuncUnitConfig.py => src/cpu/o3/FuncUnitConfig.py
rename : src/python/m5/objects/O3CPU.py => src/cpu/o3/O3CPU.py
rename : src/python/m5/objects/OzoneCPU.py => src/cpu/ozone/OzoneCPU.py
rename : src/python/m5/objects/SimpleOzoneCPU.py => src/cpu/ozone/SimpleOzoneCPU.py
rename : src/python/m5/objects/BadDevice.py => src/dev/BadDevice.py
rename : src/python/m5/objects/Device.py => src/dev/Device.py
rename : src/python/m5/objects/DiskImage.py => src/dev/DiskImage.py
rename : src/python/m5/objects/Ethernet.py => src/dev/Ethernet.py
rename : src/python/m5/objects/Ide.py => src/dev/Ide.py
rename : src/python/m5/objects/Pci.py => src/dev/Pci.py
rename : src/python/m5/objects/Platform.py => src/dev/Platform.py
rename : src/python/m5/objects/SimConsole.py => src/dev/SimConsole.py
rename : src/python/m5/objects/SimpleDisk.py => src/dev/SimpleDisk.py
rename : src/python/m5/objects/Uart.py => src/dev/Uart.py
rename : src/python/m5/objects/AlphaConsole.py => src/dev/alpha/AlphaConsole.py
rename : src/python/m5/objects/Tsunami.py => src/dev/alpha/Tsunami.py
rename : src/python/m5/objects/T1000.py => src/dev/sparc/T1000.py
rename : src/python/m5/objects/Bridge.py => src/mem/Bridge.py
rename : src/python/m5/objects/Bus.py => src/mem/Bus.py
rename : src/python/m5/objects/MemObject.py => src/mem/MemObject.py
rename : src/python/m5/objects/PhysicalMemory.py => src/mem/PhysicalMemory.py
rename : src/python/m5/objects/BaseCache.py => src/mem/cache/BaseCache.py
rename : src/python/m5/objects/CoherenceProtocol.py => src/mem/cache/coherence/CoherenceProtocol.py
rename : src/python/m5/objects/Repl.py => src/mem/cache/tags/Repl.py
rename : src/python/m5/objects/Process.py => src/sim/Process.py
rename : src/python/m5/objects/Root.py => src/sim/Root.py
rename : src/python/m5/objects/System.py => src/sim/System.py
extra : convert_revision : 173f8764bafa8ef899198438fa5573874e407321
2007-05-27 19:21:17 -07:00
Nathan Binkert
4f0f217c1b Get rid of GNU libelf and its autoconf nastiness and replace
it with FreeBSD's implementation

--HG--
extra : convert_revision : ef9c4551b9a6b54b76a89f286ff9804c55790621
2007-05-26 18:15:22 -07:00
Gabe Black
a3ae9486d5 Merge zizzer.eecs.umich.edu:/bk/newmem
into  doughnut.mwconnections.com:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 276d00a73b1834d5262129c3f7e0f7fae18e23bc
2007-05-25 19:29:32 -07:00
Gabe Black
ad02a59f89 Make the lexer and parser use objects and not the last lexer and parser generated.
--HG--
extra : convert_revision : e751969973599cde711f9d4de0dc4772dda651ed
2007-05-25 19:26:26 -07:00
Nathan Binkert
44ebb8d3e2 Update to ply 2.3
ext/ply/ply/lex.py:
ext/ply/ply/yacc.py:
ext/ply/CHANGES:
ext/ply/README:
ext/ply/TODO:
ext/ply/doc/ply.html:
ext/ply/example/ansic/clex.py:
ext/ply/example/ansic/cparse.py:
ext/ply/example/calc/calc.py:
ext/ply/example/hedit/hedit.py:
ext/ply/example/optcalc/calc.py:
ext/ply/test/README:
ext/ply/test/calclex.py:
ext/ply/test/lex_doc1.exp:
ext/ply/test/lex_doc1.py:
ext/ply/test/lex_dup1.exp:
ext/ply/test/lex_dup1.py:
ext/ply/test/lex_dup2.exp:
ext/ply/test/lex_dup2.py:
ext/ply/test/lex_dup3.exp:
ext/ply/test/lex_dup3.py:
ext/ply/test/lex_empty.py:
ext/ply/test/lex_error1.py:
ext/ply/test/lex_error2.py:
ext/ply/test/lex_error3.exp:
ext/ply/test/lex_error3.py:
ext/ply/test/lex_error4.exp:
ext/ply/test/lex_error4.py:
ext/ply/test/lex_hedit.exp:
ext/ply/test/lex_hedit.py:
ext/ply/test/lex_ignore.exp:
ext/ply/test/lex_ignore.py:
ext/ply/test/lex_re1.exp:
ext/ply/test/lex_re1.py:
ext/ply/test/lex_rule1.py:
ext/ply/test/lex_token1.py:
ext/ply/test/lex_token2.py:
ext/ply/test/lex_token3.py:
ext/ply/test/lex_token4.py:
ext/ply/test/lex_token5.exp:
ext/ply/test/lex_token5.py:
ext/ply/test/yacc_badargs.exp:
ext/ply/test/yacc_badargs.py:
ext/ply/test/yacc_badprec.exp:
ext/ply/test/yacc_badprec.py:
ext/ply/test/yacc_badprec2.exp:
ext/ply/test/yacc_badprec2.py:
ext/ply/test/yacc_badrule.exp:
ext/ply/test/yacc_badrule.py:
ext/ply/test/yacc_badtok.exp:
ext/ply/test/yacc_badtok.py:
ext/ply/test/yacc_dup.exp:
ext/ply/test/yacc_dup.py:
ext/ply/test/yacc_error1.exp:
ext/ply/test/yacc_error1.py:
ext/ply/test/yacc_error2.exp:
ext/ply/test/yacc_error2.py:
ext/ply/test/yacc_error3.exp:
ext/ply/test/yacc_error3.py:
ext/ply/test/yacc_inf.exp:
ext/ply/test/yacc_inf.py:
ext/ply/test/yacc_missing1.exp:
ext/ply/test/yacc_missing1.py:
ext/ply/test/yacc_nodoc.exp:
ext/ply/test/yacc_nodoc.py:
ext/ply/test/yacc_noerror.exp:
ext/ply/test/yacc_noerror.py:
ext/ply/test/yacc_nop.exp:
ext/ply/test/yacc_nop.py:
ext/ply/test/yacc_notfunc.exp:
ext/ply/test/yacc_notfunc.py:
ext/ply/test/yacc_notok.exp:
ext/ply/test/yacc_notok.py:
ext/ply/test/yacc_rr.exp:
ext/ply/test/yacc_rr.py:
ext/ply/test/yacc_simple.exp:
ext/ply/test/yacc_simple.py:
ext/ply/test/yacc_sr.exp:
ext/ply/test/yacc_sr.py:
ext/ply/test/yacc_term1.exp:
ext/ply/test/yacc_term1.py:
ext/ply/test/yacc_unused.exp:
ext/ply/test/yacc_unused.py:
ext/ply/test/yacc_uprec.exp:
ext/ply/test/yacc_uprec.py:
    Import patch ply.diff
src/arch/isa_parser.py:
    everything is now within the ply package

--HG--
rename : ext/ply/lex.py => ext/ply/ply/lex.py
rename : ext/ply/yacc.py => ext/ply/ply/yacc.py
extra : convert_revision : fca8deabd5c095bdeabd52a1f236ae1404ef106e
2007-05-24 21:54:51 -07:00
Steve Reinhardt
41241799ae Change getDeviceAddressRanges to use bool for snoop arg.
--HG--
extra : convert_revision : 832e52ba80cbab2f5bb6d5b5977a499d41b4d638
2007-05-21 23:36:09 -07:00
Steve Reinhardt
05d14cf3e2 Add new EventWrapper constructor that takes a Tick value
and schedules the event immediately.

--HG--
extra : convert_revision : a84e729a5ef3632cbe6cff858c453c782707d983
2007-05-20 21:43:01 -07:00
Steve Reinhardt
87adc37e91 Insist that PhysicalMemory object have at least one connection.
--HG--
extra : convert_revision : 36c33d25a3b23ac2094577aa504c24fac0f3ffcc
2007-05-20 18:23:05 -07:00
Steve Reinhardt
aa5b595f39 Oops... some places in C++ explicitly ask for a "functional"
port.  It would be better to move this to python IMO but for
now I'll stick in a compatibility hack.

--HG--
extra : convert_revision : a81a29cbd43becd0e485559eb7b2a31f7a0b082d
2007-05-19 01:20:58 -04:00
Steve Reinhardt
0305159abf PhysicalMemory has vector of uniform ports instead of one special one.
configs/example/memtest.py:
    PhysicalMemory has vector of uniform ports instead of one special one.
    Other updates to fix obsolete brokenness.
src/mem/physical.cc:
src/mem/physical.hh:
src/python/m5/objects/PhysicalMemory.py:
    Have vector of uniform ports instead of one special one.
src/python/swig/pyobject.cc:
    Add comment.

--HG--
extra : convert_revision : a4a764dcdcd9720bcd07c979d0ece311fc8cb4f1
2007-05-19 00:24:34 -04:00
Gabe Black
a13d5af274 Merge zizzer.eecs.umich.edu:/bk/newmem
into  doughnut.mwconnections.com:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 3f17fc418ee5a30da2b08a515fb394cc8fcdd237
2007-05-18 13:36:47 -07:00
Gabe Black
6a6e62014e Changes to make simple cpu handle pcs appropriately for x86
--HG--
extra : convert_revision : cf68886d53301e0a63705247bd7d66b2ff08ea84
2007-05-18 10:42:50 -07:00
Ali Saidi
f487edf146 Merge zizzer:/bk/newmem
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : 32dc1bec7fdb1ecb8879ed2dd745c4b23929aeab
2007-05-15 18:06:52 -04:00
Ali Saidi
f317227b4e hopefully the final hacky change to make the bus bridge work ok
cache blocks that get dmaed ARE NOT marked invalid in the caches so it's a performance issue here

src/mem/bridge.cc:
src/mem/bridge.hh:
    hopefully the final hacky change to make the bus bridge work ok

--HG--
extra : convert_revision : 62cbc65c74d1a84199f0a376546ec19994c5899c
2007-05-15 17:39:50 -04:00
Steve Reinhardt
224ae7813d Merge vm1.(none):/home/stever/bk/newmem-head
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : 8a501917daf81021212d136b4ebbfa059b452a13
2007-05-14 13:54:22 -07:00
Ali Saidi
fcf85725b5 Merge zizzer:/bk/newmem
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : e445097240af7b4e73efaca855cd1f217cf00313
2007-05-14 16:37:22 -04:00
Ali Saidi
57104ea5f9 couple more bug fixes for intel nic
src/dev/i8254xGBe.cc:
src/dev/i8254xGBe.hh:
    couple more bug fixes

--HG--
extra : convert_revision : ae5b806528c1ec06f0091e1f6e50fc0721057ddb
2007-05-14 16:37:00 -04:00
Ali Saidi
ea4e6f2e3d add uglyiness to fix dmas
src/dev/io_device.cc:
    extra printing and assertions
src/mem/bridge.hh:
    deal with packets only satisfying part of a request by making many requests
src/mem/cache/cache_impl.hh:
    make the cache try to satisfy a functional request from the cache above it before checking itself

--HG--
extra : convert_revision : 1df52ab61d7967e14cc377c560495430a6af266a
2007-05-14 16:14:59 -04:00
Steve Reinhardt
fecae03a0b Eliminate unused PacketPtr from BaseCache's
RequestEvent and ResponseEvent.
Compiles but not tested.

--HG--
extra : convert_revision : cc791e7adea5b0406e986a0076edba51856b9105
2007-05-13 23:09:10 -07:00
Steve Reinhardt
df3fc36fa9 Split BaseCache::CacheEvent into RequestEvent and ResponseEvent.
Compiles but not tested.

--HG--
extra : convert_revision : 4e1e28c4b87721ccfcf35a5ea62c1fa324acbaf9
2007-05-13 22:58:06 -07:00
Ali Saidi
af26532bbd fix handling of atomic packets
fix up code for counting requests and responses

--HG--
extra : convert_revision : 0d70981ee41c5d9c36cad01bd505281a096f6119
2007-05-13 01:44:42 -04:00
Nathan Binkert
011db5c851 Move full CPU sim object stuff into the encumbered directory
--HG--
extra : convert_revision : 788068dd4f4994d0016dba7e8705359d45a3a45c
2007-05-11 15:01:44 -07:00
Nathan Binkert
113319a7da Float should have a c++ param type
--HG--
extra : convert_revision : 150bbe7f31aafb43a75195fc2a365fb3c0ec5673
2007-05-11 11:48:58 -07:00
Nathan Binkert
d667ce01b4 total should be the sum of the vector result of an operation,
not sum the operands and then apply the operation.

--HG--
extra : convert_revision : 06486e59b3dd9588b458ef45c341cc4f2554dc09
2007-05-11 11:47:18 -07:00
Ali Saidi
634d2e9d83 remove hit_latency and make latency do the right thing
set the latency parameter in terms of a latency
add caches to tsunami-simple configs

configs/common/Caches.py:
tests/configs/memtest.py:
tests/configs/o3-timing-mp.py:
tests/configs/o3-timing.py:
tests/configs/simple-atomic-mp.py:
tests/configs/simple-timing-mp.py:
tests/configs/simple-timing.py:
    set the latency parameter in terms of a latency
configs/common/FSConfig.py:
    give the bridge a default latency too
src/mem/cache/cache_builder.cc:
src/python/m5/objects/BaseCache.py:
    remove hit_latency and make latency do the right thing
tests/configs/tsunami-simple-atomic-dual.py:
tests/configs/tsunami-simple-atomic.py:
tests/configs/tsunami-simple-timing-dual.py:
tests/configs/tsunami-simple-timing.py:
    add caches to tsunami-simple configs

--HG--
extra : convert_revision : 37bef7c652e97c8cdb91f471fba62978f89019f1
2007-05-10 18:24:48 -04:00
Ali Saidi
e08a5c6052 Merge zizzer:/bk/newmem
into  pb15.local:/Users/ali/work/m5.newmem.zeep

tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/m5stats.txt:
    the new version of this is what we want

--HG--
extra : convert_revision : 204df6f8181df81e423def4695cd81544c485c47
2007-05-10 00:36:47 -04:00
Ali Saidi
4a37c48e8e add/update parameters for bus bridge
--HG--
extra : convert_revision : 063f757fbfa2c613328ffa70e556f8926623fa91
2007-05-10 00:08:22 -04:00
Ali Saidi
69ea50c163 couple of updates in the intel nic
--HG--
extra : convert_revision : da68e5e6411000d9d5247f769ee528a443286c61
2007-05-09 22:39:43 -04:00
Ali Saidi
9dfbea68a2 update for new reschedule semantics
--HG--
extra : convert_revision : 8c18b2513d638f67cc096e7f1483b47390a374ca
2007-05-09 22:34:54 -04:00
Ali Saidi
ff55888575 undo my previous bus change, it can make the bus deadlock.. so it still constantly reschedules itself
--HG--
extra : convert_revision : b5ef1aa0a6a2e32bd775d2dbcad9cd9505ad9b78
2007-05-09 22:23:01 -04:00
Ali Saidi
3c608bf765 add a backoff algorithm when nacks are received by devices
add seperate response buffers and request queue sizes in bus bridge
add delay to respond to a nack in the bus bridge

src/dev/i8254xGBe.cc:
src/dev/ide_ctrl.cc:
src/dev/ns_gige.cc:
src/dev/pcidev.hh:
src/dev/sinic.cc:
    add backoff delay parameters
src/dev/io_device.cc:
src/dev/io_device.hh:
    add a backoff algorithm when nacks are received.
src/mem/bridge.cc:
src/mem/bridge.hh:
    add seperate response buffers and request queue sizes
    add a new parameters to specify how long before a nack in ready to go after a packet that needs to be nacked is received
src/mem/cache/cache_impl.hh:
    assert on the
src/mem/tport.cc:
    add a friendly assert to make sure the packet was inserted into the list

--HG--
extra : convert_revision : 3595ad932015a4ce2bb72772da7850ad91bd09b1
2007-05-09 18:20:24 -04:00
Ali Saidi
37b45e3c8c fix the translating ports so it can add a page on a fault
--HG--
extra : convert_revision : 56f6f2cbf4e92b7f2dd8c9453831fab86d83ef80
2007-05-09 15:37:46 -04:00
Ali Saidi
939cbd8201 Merge zizzer:/bk/newmem
into  udhcp-macvpn-703.public.engin.umich.edu:/Users/ali/work/m5.newmem

--HG--
extra : convert_revision : e977c5b194954774b6503484797f1c1e0eb4e425
2007-05-09 12:02:36 -04:00
Ali Saidi
ee70d8cfc4 bit_val was being used directly in the statement in return. If type B had fewer bits than last, bit_val << last would get the wrong answer.
src/base/bitfield.hh:
    bit_val was being used directly in the statement in
    return. If type B had fewer bits than last, bit_val << last would get
    the wrong answer.

--HG--
extra : convert_revision : cbc43ccd139f82ebbd65f30af5d05b87c4edac64
2007-05-09 12:01:31 -04:00
Ali Saidi
a38c79ec22 the bridge never returns false when recvTiming() is called on its ports now, it always returns true and nacks the packet if there isn't sufficient buffer space
fix the timing cpu to handle receiving a nacked packet

src/cpu/simple/timing.cc:
    make the timing cpu handle receiving a nacked packet
src/mem/bridge.cc:
src/mem/bridge.hh:
    the bridge never returns false when recvTiming() is called on its ports now, it always returns true and nacks the packet if there isn't sufficient buffer space

--HG--
extra : convert_revision : 5e12d0cf6ce985a5f72bcb7ce26c83a76c34c50a
2007-05-07 18:58:38 -04:00
Ali Saidi
0dfc29a023 fix partial writes with a functional memory hack
figure out the block size from devices attached to the bus otherwise use a default block size when no devices that care are attached

configs/common/FSConfig.py:
src/mem/bridge.cc:
src/mem/bridge.hh:
src/python/m5/objects/Bridge.py:
    fix partial writes with a functional memory hack
src/mem/bus.cc:
src/mem/bus.hh:
src/python/m5/objects/Bus.py:
    figure out the block size from devices attached to the bus otherwise use a default block size when no devices that care are attached
src/mem/packet.cc:
    fix WriteInvalidateResp to not be a request that needs a response since it isn't
src/mem/port.hh:
    by default return 0 for deviceBlockSize instead of panicing. This makes finding the block size the bus should use easier

--HG--
extra : convert_revision : 3fcfe95f9f392ef76f324ee8bd1d7f6de95c1a64
2007-05-07 14:42:03 -04:00
Ali Saidi
3f2b039c98 change the way dprintf works so the cache accesses required to fulfill the dprintf aren't show in between the Cycle: name:
printing and the actual formatted string being printed

--HG--
extra : convert_revision : 8876ba938ba971f854bab490c9af10db039a2e83
2007-05-01 18:14:16 -04:00
Ali Saidi
39743d35a3 fix flushAddr so it doesn't modify an iterator that has been deleted
--HG--
extra : convert_revision : 8b7e4948974517b13616ab782aa7e84471b24f10
2007-05-01 18:12:58 -04:00
Ali Saidi
e0f8e57a7f Merge zizzer:/bk/newmem
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : 7e4b82f5949c0807d93fff80c44a8828968d1248
2007-05-01 12:33:03 -04:00
Ali Saidi
ccdf60f7b2 initialize lastTxInt to 0
--HG--
extra : convert_revision : 4c5e9c2145b12fdeba91f3fdd8963c35abe326c2
2007-05-01 12:32:30 -04:00
Ali Saidi
8d56145d7b always skip the debugprintf function (DebugPrintf traceflag shouldn't matter). Otherwise, when you turn on debugprintf alters the execution
--HG--
extra : convert_revision : 1c9a665e3b7234cacf06c31d2e7886244a9e82bc
2007-04-30 22:49:21 -04:00
Ali Saidi
7baf29c9d0 fix igbe bug
--HG--
extra : convert_revision : 01ffc08f5c1ec827a42f60562ae7e10176ffdb7f
2007-04-30 13:18:44 -04:00
Ali Saidi
58b9047194 fix console printing bug
--HG--
extra : convert_revision : 5481b72b22e7a2cf3367d777309bc30201f3b1fc
2007-04-30 13:13:03 -04:00
Ali Saidi
ae4208f3a3 add the ability for the ethernet device to check if the link is busy
--HG--
extra : convert_revision : 0dc0c4c4546869261f4508ad22a6a85aecf3c334
2007-04-30 13:09:13 -04:00
Nathan Binkert
69d259b6ae gcc 4.1 claims that mem_data might be used uninitialized,
though I don't believe that's true.  Placate it anyway.

--HG--
extra : convert_revision : dcd9427af14f0e7a33510054bee4ecbe73e050be
2007-04-27 13:59:17 -07:00
Kevin Lim
092951e2b1 Remove extra delete that was causing segfault.
--HG--
extra : convert_revision : 8a27ed80308c95988f3bc43d670dc0ac9e946d39
2007-04-26 00:07:42 -04:00
Kevin Lim
15cc194d71 Remove unnecessary check.
--HG--
extra : convert_revision : 8cc2943ebc41e4d430789ee7923dd0dc878be06b
2007-04-26 00:02:37 -04:00
Ron Dreslinski
3eb4ba3abb Merge zizzer:/bk/newmem
into  zazzer.eecs.umich.edu:/z/rdreslin/m5bk/head

--HG--
extra : convert_revision : 11df5fb2a8f1fa020d042e75b22a7f2f2bcbd9ab
2007-04-23 14:38:04 -04:00
Kevin Lim
dbc1edd23d Merge ktlim@zizzer:/bk/newmem
into  zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/head

--HG--
extra : convert_revision : 05f738ab6cf1e8bd2940f4ce20602f1e8ad1af48
2007-04-22 15:31:33 -04:00
Kevin Lim
8c7a6e1654 Use proper cycles for IPC and CPI equations.
src/cpu/o3/cpu.cc:
    Use proper cycles for these equations.

--HG--
extra : convert_revision : cd49410eed978c789d788e80462abed6cb89fbae
2007-04-22 15:11:54 -04:00
Ali Saidi
53ba34391f fixes for solaris compile
--HG--
extra : convert_revision : c82a62a61650e3700d237da917c453e5a9676320
2007-04-21 19:11:38 -04:00
Ali Saidi
e8ace88e89 create base/fenv.c to standerdize fenv across platforms. It's a c file and not a cpp file because c99
(which defines fenv) doesn't necessarily extend to c++ and it is a problem with solaris. If really
desired this could wrap the ieeefp interface found in bsd* as well, but I see no need at the moment.

src/arch/alpha/isa/fp.isa:
src/arch/sparc/isa/formats/basic.isa:
    use m5_fesetround()/m5_fegetround() istead of fenv interface directly
src/arch/sparc/isa/includes.isa:
    use base/fenv instead of fenv directly
src/base/SConscript:
    add fenv to sconscript
src/base/fenv.hh:
src/base/random.cc:
    m5 implementation to standerdize fenv across platforms.

--HG--
extra : convert_revision : 38d2629affd964dcd1a5ab0db4ac3cb21438e72c
2007-04-21 17:50:47 -04:00
Nathan Binkert
6f4c1aa475 Move the turbolaser python simobject stuff into the
encumbered directory

--HG--
extra : convert_revision : 7062ce81183b989f0d922b00d02433633474a854
2007-04-18 11:15:52 -07:00
Nathan Binkert
d92fff858b fix SIGUSR1 and SIGUSR2 by clearing the variables after
they're used

--HG--
extra : convert_revision : ed5351f291d45d585bf811a062e162e16b86e886
2007-04-18 08:04:46 -07:00
Ron Dreslinski
3b95161da8 Merge zizzer:/bk/newmem
into  zazzer.eecs.umich.edu:/z/rdreslin/m5bk/head

--HG--
extra : convert_revision : 8630b3771678b68d5cd12a61f7a4de2e3443a8d7
2007-04-16 11:32:09 -04:00
Ron Dreslinski
2952c34096 Fixes for splash, may conflict with Korey's SMT work and doesn't support 03cpu yet.
src/cpu/simple/base.cc:
    Cpu's should start as unallocated, not suspended
src/cpu/simple_thread.cc:
    Wait for a thread to be assigned to activate the cpu
src/kern/tru64/tru64.hh:
    When looking for a open cpu to assign threads, look for an unallocated one, not a suspended one.

--HG--
extra : convert_revision : 5e3ad2e96b4a715ed38293ceaccff5b9f4ea7985
2007-04-16 11:31:54 -04:00
Nathan Binkert
a575fbd4aa Completely re-work how the scons framework incorporates swig
and python code into m5 to allow swig an python code to
easily added by any SConscript instead of just the one in
src/python.  This provides SwigSource and PySource for
adding new files to m5 (similar to Source for C++).  Also
provides SimObject for including files that contain SimObject
information and build the m5.objects __init__.py file.

--HG--
extra : convert_revision : 38b50a0629846ef451ed02f96fe3633947df23eb
2007-04-12 21:20:04 -07:00
Nathan Binkert
eefbda7f7c Don't allow Source to accept multiple arguments, lists,
or automatically do Split().  It isn't used anywhere, and
isn't very consistent with the python features that are
about to be added.  Do accept SCons.Node.FS.File arguments
though.

--HG--
extra : convert_revision : 0f3bb0e9e6806490330eea59a104013042b4dd49
2007-04-12 09:07:59 -07:00
Nathan Binkert
e04208f046 Fix NextEthernetAddr.
unproxy() needs to return a new object otherwise all
instances will use the same value.  This fix is more
or less unique to NextEthernetAddr because its use of
the proxy stuff is a bit different than everything else.

--HG--
extra : convert_revision : 2ce452e37d00b9ba76b6abfaec0ad2e0073920d7
2007-04-12 08:37:55 -07:00
Nathan Binkert
fa2a93a236 Add a scons hack to force symlinks to the swig .i files
to be created

--HG--
extra : convert_revision : 826cc692614528f987c80c3410cb025190f0a4e0
2007-04-12 08:35:19 -07:00
Gabe Black
6ec510385d Merge zizzer.eecs.umich.edu:/bk/newmem
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : 50102b96ba07b2b132d649a111268ee1f08c2147
2007-04-11 15:30:09 +00:00
Gabe Black
c382bdf93d Use a computed mask to mask out the fetch address and not a hard coded one.
--HG--
extra : convert_revision : c22907bed4b83f0dff51d2283dafe4f76fa9e94a
2007-04-11 14:16:54 +00:00
Gabe Black
54abc8b337 Make the itlb set the PHYSICAL flag on a request when it translates it. This gets it out of the cpu.
--HG--
extra : convert_revision : 20611263b799b5e835116adbf39d2ecc78701eef
2007-04-11 14:02:03 +00:00
Gabe Black
121a5438a5 Make trying to execute macroops fail with a better error message.
--HG--
extra : convert_revision : e81c0337d6db4b5a33381ed19686750bbb9d9178
2007-04-11 12:26:23 +00:00
Gabe Black
e72f1e63f0 Create a filter and a union to translate the SPARC instruction implementations from using doubles to using concatenated singles.
--HG--
extra : convert_revision : 609ba35bbb13cbd1998e93957cb051461442d1f9
2007-04-11 12:25:00 +00:00
Gabe Black
fcc35a67e0 Merge zizzer.eecs.umich.edu:/bk/newmem
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : c5275ef3e53393496a2ebe05b2f516884bb392f9
2007-04-10 17:27:33 +00:00
Gabe Black
74122c04cf Even if you don't want to fetch more bytes, make sure you handle a fault.
--HG--
extra : convert_revision : cfebc877b9b2ebc8927ce8267867eb40ad6d59c6
2007-04-10 17:27:12 +00:00
Gabe Black
798caa36ad Include the new GenFault microop.
--HG--
extra : convert_revision : 6c943329525d2a01f35ad5e56ff91505d5011d7b
2007-04-10 17:26:04 +00:00
Gabe Black
9f4ebf9156 Reworked x86 a bit
--HG--
extra : convert_revision : def1a30e54b59c718c451a631a1be6f8e787e843
2007-04-10 17:25:15 +00:00
Gabe Black
b79cacaf3f Changed some instruction names to be in all caps, and "implemented" move to test the stub code for instructions.
--HG--
extra : convert_revision : a377daf20545dfcbb0f97d8cafbe3d68416dc4b2
2007-04-10 17:22:45 +00:00
Gabe Black
1320e294fe Added a class which lets you manipulate all the strings returned by the parser as a unit.
--HG--
extra : convert_revision : eec4b188b44b80cee643542bbd1aaa139cbc4ef0
2007-04-10 17:14:51 +00:00
Gabe Black
c59f9456b9 Fix up the base x86 fault object and create a fault to be generated by unimplemented instructions in their microcode. This is useful if certain variations of an instruction are implemented, but, for instance, it's memory based versions aren't.
--HG--
extra : convert_revision : 24e69c5a6a0af2d0cf67e858a051ae6624bb300f
2007-04-10 17:13:26 +00:00
Gabe Black
5476247623 Fixed a compile error.
--HG--
extra : convert_revision : 70221349a7100c89be0d03210f3b04950370583f
2007-04-10 01:52:38 +00:00
Gabe Black
d54b8b73ed Comment out the remote gdb object for SE mode.
--HG--
extra : convert_revision : a582684f3a2dd1d1d0d8b93a9e213d9108491535
2007-04-09 18:30:50 +00:00
Kevin Lim
64b4572c3e Merge ktlim@zizzer:/bk/newmem
into  zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/head

--HG--
extra : convert_revision : a250eed999be9b8acd6f420fdfe8f1b02905beb1
2007-04-09 14:30:49 -04:00
Kevin Lim
0cc343d41d Fix bug when blocking due to no free registers.
--HG--
extra : convert_revision : a1a218d3294515184689041487057495223360b7
2007-04-09 14:29:59 -04:00
Gabe Black
f53d2ccbfc Merge zizzer.eecs.umich.edu:/bk/newmem
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 1396ed5b264d29377ef9793a763225a93181f65f
2007-04-09 07:59:57 +00:00
Gabe Black
85f9213b8a Accidentally didn't save when moving the specialization code out of here.
--HG--
extra : convert_revision : 1ffe0c497e10fef1eb84b3c97c00b98d820fbb97
2007-04-09 01:08:05 +00:00
Gabe Black
c7bb106886 Take into account that the flattened integer register space is a different size than the architected one. Also fixed some asserts.
--HG--
extra : convert_revision : 26e7863919d1b976ba8cad747af475a6f18e9440
2007-04-08 23:31:11 +00:00
Gabe Black
d29979b043 Merge zizzer.eecs.umich.edu:/bk/newmem
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : dba3542ab73cc8ae46347a14ae4c133f1276011c
2007-04-08 01:54:08 +00:00
Gabe Black
3bb5fd8c44 Get the "hard" SPARC instructions working in o3. I don't like that the IsStoreConditional flag needs to be set for them because they aren't store conditional instructions, and I should fix the format code which is not handling the opt_flags correctly.
--HG--
extra : convert_revision : cfd32808592832d7b6fbdaace5ae7b17c8a246e9
2007-04-08 01:42:42 +00:00
Gabe Black
5d52cd6409 Move the instruction specialization stuff out of the microassembler file, and added some comments to main.isa
--HG--
extra : convert_revision : 1534ae7d5a9e95bf662d79a04f9286c227541c6c
2007-04-06 16:55:56 +00:00
Gabe Black
a3ed19f82a Merge zizzer.eecs.umich.edu:/bk/newmem
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 8e624bb95cb9f478ca7ac1dbbd64e20674e3e224
2007-04-06 16:39:47 +00:00
Gabe Black
59df95c7e6 Consolidated the microcode assembler to help separate it from more x86-centric stuff.
--HG--
extra : convert_revision : 5e7e8026e24ce44a3dac4a358e0c3e5560685958
2007-04-06 16:39:25 +00:00
Gabe Black
2a1c102f25 Refactored the x86 isa description some more. There should be more seperation between x86 specific parts, and those parts which are implemented in the isa description but could eventually be moved elsewhere.
--HG--
rename : src/arch/x86/isa/formats/macroop.isa => src/arch/x86/isa/macroop.isa
extra : convert_revision : 5ab40eedf574fce438d9fe90e00a496dc95c8bcf
2007-04-06 16:00:56 +00:00
Gabe Black
75e8838ba4 Clean up the code a little, fix (I think) a perceived problem with immediate sizes, and sign extend the 32-bit-acting-like-64-bit-immediates.
--HG--
extra : convert_revision : e59b747198cc79d50045bd2dc45b2e2b97bbffcc
2007-04-06 15:19:23 +00:00
Gabe Black
e633e23a3a Add in a stub merging function
--HG--
extra : convert_revision : 15e3cdb4ebcd31bc44204687ba59dde00c56c6be
2007-04-06 15:16:36 +00:00
Gabe Black
47c24ff07a Clean up the macroop code.
--HG--
extra : convert_revision : 3cf83c3e038fece6190dbb91f56deb0498c9a70d
2007-04-06 15:15:36 +00:00
Gabe Black
3c9768e644 Merge zizzer.eecs.umich.edu:/bk/newmem
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : b7e89d32df946ea24c438292308f5fc8248f8bd9
2007-04-06 14:37:46 +00:00