Gabe Black
|
6aa229386d
|
ARM: Implement a function to decode CP15 registers to MiscReg indices.
|
2010-06-02 12:58:08 -05:00 |
|
Gabe Black
|
f0811eb208
|
ARM: Define versions of MSR and MRS outside the decoder.
|
2010-06-02 12:58:05 -05:00 |
|
Gabe Black
|
b02c7f1bcd
|
ARM: Move the macro mem constructor out of the isa desc.
This code doesn't use the parser at all, and moving it out reduces the
conceptual complexity of that code.
|
2010-06-02 12:58:03 -05:00 |
|
Gabe Black
|
96be7e16c1
|
ARM: Make the predecoder handle Thumb instructions.
|
2010-06-02 12:58:00 -05:00 |
|
Ali Saidi
|
1470dae8e9
|
ARM: Boilerplate full-system code.
--HG--
rename : src/arch/sparc/interrupts.hh => src/arch/arm/interrupts.hh
rename : src/arch/sparc/kernel_stats.hh => src/arch/arm/kernel_stats.hh
rename : src/arch/sparc/stacktrace.cc => src/arch/arm/stacktrace.cc
rename : src/arch/sparc/system.cc => src/arch/arm/system.cc
rename : src/arch/sparc/system.hh => src/arch/arm/system.hh
rename : src/dev/sparc/T1000.py => src/dev/arm/Versatile.py
rename : src/dev/sparc/t1000.cc => src/dev/arm/versatile.cc
rename : src/dev/sparc/t1000.hh => src/dev/arm/versatile.hh
|
2009-11-17 18:02:08 -06:00 |
|
Gabe Black
|
2e28da5583
|
ARM: Implement fault classes.
Implement some fault classes using the curriously recurring template pattern,
similar to SPARCs.
|
2009-11-10 20:34:38 -08:00 |
|
Gabe Black
|
519ace4dfd
|
ARM: Add a native tracer.
--HG--
rename : src/arch/sparc/SparcNativeTrace.py => src/arch/arm/ArmNativeTrace.py
rename : src/arch/sparc/nativetrace.cc => src/arch/arm/nativetrace.cc
rename : src/arch/sparc/nativetrace.hh => src/arch/arm/nativetrace.hh
|
2009-07-27 00:51:35 -07:00 |
|
Gabe Black
|
e14c408b62
|
ARM: Fold the MiscRegFile all the way into the ISA object.
|
2009-07-09 20:28:27 -07:00 |
|
Gabe Black
|
b398b8ff1b
|
Registers: Add a registers.hh file as an ISA switched header.
This file is for register indices, Num* constants, and register types.
copyRegs and copyMiscRegs were moved to utility.hh and utility.cc.
--HG--
rename : src/arch/alpha/regfile.hh => src/arch/alpha/registers.hh
rename : src/arch/arm/regfile.hh => src/arch/arm/registers.hh
rename : src/arch/mips/regfile.hh => src/arch/mips/registers.hh
rename : src/arch/sparc/regfile.hh => src/arch/sparc/registers.hh
rename : src/arch/x86/regfile.hh => src/arch/x86/registers.hh
|
2009-07-08 23:02:21 -07:00 |
|
Gabe Black
|
997f36c711
|
Registers: Collapse ARM and MIPS regfile directories.
--HG--
rename : src/arch/arm/regfile/misc_regfile.hh => src/arch/arm/misc_regfile.hh
rename : src/arch/arm/regfile/regfile.cc => src/arch/arm/regfile.cc
rename : src/arch/mips/regfile/misc_regfile.cc => src/arch/mips/misc_regfile.cc
rename : src/arch/mips/regfile/misc_regfile.hh => src/arch/mips/misc_regfile.hh
|
2009-07-08 23:02:21 -07:00 |
|
Gabe Black
|
32daf6fc3f
|
Registers: Add an ISA object which replaces the MiscRegFile.
This object encapsulates (or will eventually) the identity and characteristics
of the ISA in the CPU.
|
2009-07-08 23:02:20 -07:00 |
|
Gabe Black
|
d4a03f1900
|
ARM: Simplify the ISA desc by pulling some classes out of it.
|
2009-06-21 17:21:25 -07:00 |
|
Gabe Black
|
7d4ef8a398
|
ARM: Clear out some inherited hangers on in util.isa and utility.hh.
|
2009-06-21 09:43:55 -07:00 |
|
Stephen Hines
|
7a7c4c5fca
|
arm: add ARM support to M5
|
2009-04-05 18:53:15 -07:00 |
|