Commit graph

64 commits

Author SHA1 Message Date
Steve Reinhardt
1511370d09 More progress on checkpointing... we can now write out a checkpoint and read it back in,
though most objects don't actually serialize any data.

arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/isa_traits.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/simple_cpu/simple_cpu.hh:
dev/alpha_access.h:
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/console.cc:
dev/console.hh:
    Change unserialize param from IniFile& to const IniFile*.
cpu/simple_cpu/simple_cpu.cc:
    Change unserialize param from IniFile& to const IniFile*.
    Make unserialize call ExecContext::unserialize.
sim/eventq.cc:
    Rename MainEventQueue (no spaces) for easier parsing in checkpoints.
    Disable event serialization for now, so we can focus on the easy stuff.
sim/serialize.cc:
    Change paramIn and arrayParamIn param from IniFile& to const IniFile*.
sim/serialize.hh:
    Change unserialize, paramIn, and arrayParamIn params from IniFile& to const IniFile*.

--HG--
extra : convert_revision : 6e8853ed375eddec0e140c95a01dd51bd225f7b9
2003-10-29 00:41:24 -08:00
Steve Reinhardt
b90f810575 Revamp serialization to make it easier.
--HG--
extra : convert_revision : c57a538d7cf606dbdf5fa244f92da46bd830e335
2003-10-28 12:55:12 -08:00
Steve Reinhardt
167928f12b Minor serialization tweaks.
cpu/simple_cpu/simple_cpu.cc:
    Serialize FP regs as integers (so we get exact bit representation).
sim/serialize.cc:
    Don't panic on object rename... events come up named "event"
    and need to get renamed.  Also fix some DPRINTFs.

--HG--
extra : convert_revision : 62ad527a7aaf78ae623b70febc1331cf91cbad05
2003-10-26 22:38:53 -08:00
Steve Reinhardt
02d80c96b7 Move some common full-system CPU initialization from the
SimpleCPU & FullCPU constructors to AlphaISA::initCPU().

cpu/simple_cpu/simple_cpu.cc:
    Move some common full-system CPU initialization from the
    SimpleCPU & FullCPU constructors to AlphaISA::initCPU().
    Make 'fault' local to SimpleCPU::tick.
cpu/simple_cpu/simple_cpu.hh:
    Make 'fault' local to SimpleCPU::tick (not an object member).

--HG--
extra : convert_revision : e878dedfff06aac0548aca8b14d66c18b8916895
2003-10-24 23:20:27 -07:00
Steve Reinhardt
91cb532f9f Make FullCPU schedule its TickEvent when one of its contexts becomes active.
This fixes detailed-mpboot, which was broken as of my last change.
Also clean up some of the ExecContext status initialization.

cpu/base_cpu.hh:
    CPU::execCtxStatusChg() now takes thread_num as an arg so the CPU knows
    which execContext had the status change.
    BaseCPU::registerExecContexts() no longer needs to be virtual.
cpu/exec_context.cc:
    Initialize _status directly... don't use setStatus() as this will notify the CPU
    of the change before it is ready.
    CPU::execCtxStatusChg() now takes thread_num as an arg so the CPU knows
    which execContext had the status change.
cpu/exec_context.hh:
    Don't need initStatus() any more.
cpu/simple_cpu/simple_cpu.cc:
    Move execCtxStatusChg() from header to .cc file.
    No longer need specialized version of registerExecContexts to schedule TickEvent.
cpu/simple_cpu/simple_cpu.hh:
    Move execCtxStatusChg() from header to .cc file.
    CPU::execCtxStatusChg() now takes thread_num as arg (must be 0 for SimpleCPU).
    No longer need specialized version of registerExecContexts to schedule TickEvent.
kern/tru64/tru64_system.cc:
    Don't need initRegs; the PC etc. get initialized in the CPU constructor.
    ExecContexts start out as Unallocated, so no need to set them to Unallocated here.
kern/tru64/tru64_system.hh:
    Don't need initRegs; the PC etc. get initialized in the CPU constructor.
sim/prog.cc:
    ExecContexts start out as Unallocated, so no need to set them to Unallocated here.

--HG--
extra : convert_revision : e960ebbeb845960344633798e251b6c8bf1c0378
2003-10-24 23:02:36 -07:00
Steve Reinhardt
cd6b6df581 A few minor fixes to sampling... seems to work now for the base case
of two CPUs and one switch-over event.  Still some stats glitches though.

cpu/simple_cpu/simple_cpu.cc:
    Schedule switched-to CPU right on curTick so we don't lose a cycle.
    Remember to switch out old CPU.

--HG--
extra : convert_revision : f1bf21cac054c74f59770d8b20b30118f46be6f1
2003-10-23 21:52:46 -07:00
Steve Reinhardt
f5da73b688 Initial support for CPU switching. New SamplingCPU object encompasses a set
of CPUs that get switched round-robin (though currently we're only shooting for
two CPUs and one switch event, and even that doesn't quite work yet).  Registration
of ExecContexts with System/Process object factored out so we can create two CPUs
but only register one of them at a time.  Also worked at making behavior and naming
in System and Process objects more consistent.

arch/alpha/ev5.cc:
    Rename ipr_init to initIPRs and get rid of unused mem arg.
arch/alpha/fake_syscall.cc:
    Process:numCpus is now a function (not a data member).
base/remote_gdb.hh:
    Support for ExecContext switching.
cpu/base_cpu.cc:
cpu/base_cpu.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/simple_cpu/simple_cpu.hh:
    Support for ExecContext switching.
    Renamed contexts array to execContexts to be consistent with Process.
    CPU ID now auto-assigned by system object.
cpu/simple_cpu/simple_cpu.cc:
    Support for ExecContext switching.
    Renamed contexts array to execContexts to be consistent with Process.
    CPU ID now auto-assigned by system object.
    Cleaned up MP full-system initialization a bit.
dev/alpha_console.cc:
    Renamed xcvec array to execContexts to be consistent with Process.
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
    Support for ExecContext switching.
    CPU ID now auto-assigned by system object.
sim/prog.cc:
sim/prog.hh:
    Support for ExecContext switching.
    Process:numCpus is now a function (not a data member).
sim/system.cc:
sim/system.hh:
    Support for ExecContext switching.
    Renamed xcvec array to execContexts to be consistent with Process.

--HG--
extra : convert_revision : 79649cffad5bf3e83de8df44236941907926d791
2003-10-23 19:07:52 -07:00
Nathan Binkert
e0b065ff7c Separate the stuff for SimObject from SimObject builder.
This makes testing a bit easier.

arch/alpha/alpha_memory.cc:
cpu/intr_control.cc:
cpu/memtest/memtest.cc:
cpu/simple_cpu/simple_cpu.cc:
dev/alpha_console.cc:
dev/console.cc:
dev/disk_image.cc:
dev/etherbus.cc:
dev/etherdump.cc:
dev/etherlink.cc:
dev/ethertap.cc:
dev/simple_disk.cc:
kern/tru64/tru64_system.cc:
sim/main.cc:
sim/prog.cc:
    Need to include builder.hh
    sort #includes
sim/sim_object.cc:
sim/sim_object.hh:
    Separate the SimObjectBuilder stuff into its own file

--HG--
extra : convert_revision : e8395e0cc6ae1f180f9cd6f100795a1ac44aeed5
2003-10-20 20:17:01 -04:00
Erik Hallnor
2c7a0b87f5 simple_cpu.cc:
Add data to static memReq and make everything use it.
Add init of numLoads.

cpu/simple_cpu/simple_cpu.cc:
    Add data to static memReq and make everything use it.
    Add init of numLoads.

--HG--
extra : convert_revision : 47d98aae643c64dff4e5cf1dc770a36434122579
2003-10-20 00:46:02 -04:00
Erik Hallnor
4134477369 Add a commited loads event queue similar to the one for commited instructions.
Two new parameters for the CPU models, max_loads_any_thread and max_loads_all_threads.

cpu/memtest/memtest.cc:
cpu/memtest/memtest.hh:
    Swap out maxReads for the new commited loads model.

--HG--
extra : convert_revision : 35031329bbc476122b2203104537a9f8b46addfa
2003-10-16 17:04:18 -04:00
Nathan Binkert
8dd080032b Global whitespace fixes
Mainly removing whitespace at the end of lines.
This will reduce future diffs/conflicts.
Also adding a space after if, while, and for

This was all accomplished with:
#!/usr/bin/perl -pi~
s/[ 	]+$//;           # there is a space and a tab in the brackets
s/if\(/if (/g;
s/for\(/for (/g;
s/while\(/while (/g;

arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/arguments.hh:
arch/alpha/ev5.cc:
arch/alpha/fake_syscall.cc:
arch/alpha/isa_traits.hh:
arch/alpha/vtophys.cc:
base/cprintf.cc:
base/cprintf.hh:
base/cprintf_formats.hh:
base/dbl_list.hh:
base/fast_alloc.cc:
base/fast_alloc.hh:
base/hybrid_pred.cc:
base/hybrid_pred.hh:
base/inet.cc:
base/inifile.cc:
base/intmath.cc:
base/intmath.hh:
base/misc.cc:
base/mod_num.hh:
base/pollevent.cc:
base/random.cc:
base/random.hh:
base/range.hh:
base/refcnt.hh:
base/remote_gdb.cc:
base/remote_gdb.hh:
base/res_list.hh:
base/sat_counter.cc:
base/sat_counter.hh:
base/sched_list.hh:
base/compression/lzss_compression.cc:
base/compression/lzss_compression.hh:
base/compression/null_compression.hh:
base/loader/coff_sym.h:
base/loader/coff_symconst.h:
base/loader/ecoff_object.cc:
base/loader/object_file.cc:
base/loader/object_file.hh:
base/loader/symtab.cc:
base/loader/symtab.hh:
base/socket.cc:
base/statistics.cc:
base/statistics.hh:
base/str.cc:
base/str.hh:
base/trace.cc:
base/trace.hh:
cpu/base_cpu.cc:
cpu/base_cpu.hh:
cpu/exec_context.hh:
cpu/exetrace.cc:
cpu/intr_control.hh:
cpu/pc_event.cc:
cpu/pc_event.hh:
cpu/static_inst.hh:
cpu/full_cpu/op_class.hh:
cpu/full_cpu/smt.hh:
cpu/memtest/memtest.cc:
cpu/memtest/memtest.hh:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
dev/alpha_access.h:
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/console.cc:
dev/console.hh:
dev/disk_image.cc:
dev/disk_image.hh:
dev/etherbus.cc:
dev/etherdump.cc:
dev/etherint.cc:
dev/etherlink.cc:
dev/etherlink.hh:
dev/ethertap.cc:
dev/pcireg.h:
docs/stl.hh:
kern/tru64/dump_mbuf.cc:
kern/tru64/printf.cc:
kern/tru64/tru64_events.cc:
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
sim/debug.cc:
sim/eventq.cc:
sim/eventq.hh:
sim/host.hh:
sim/main.cc:
sim/param.cc:
sim/param.hh:
sim/prog.cc:
sim/serialize.cc:
sim/serialize.hh:
sim/sim_events.cc:
sim/sim_object.cc:
sim/sim_time.cc:
sim/sim_time.hh:
sim/system.cc:
test/bitvectest.cc:
test/circletest.cc:
test/initest.cc:
test/lru_test.cc:
test/nmtest.cc:
test/offtest.cc:
test/sized_test.cc:
test/stattest.cc:
test/symtest.cc:
util/tap/tap.cc:
util/term/term.c:
    formatting fixes

--HG--
extra : convert_revision : 01e6dbc9615c5d0e923502b8410a416c0434cdf6
2003-10-15 16:39:37 -04:00
Nathan Binkert
4759c203c7 Remove all of the Tru64 specific stuff from the base System object
into its own Tru64System object.  Also remove the System builder
stuff and create a Tru64System builder.  This makes it much
simpler to support more operating systems.

arch/alpha/ev5.cc:
    Each system provides its own mechanism for doing a breakpoint.
base/remote_gdb.hh:
    #include <map>
cpu/pc_event.cc:
cpu/pc_event.hh:
    Separate out System specific PCEvents
cpu/simple_cpu/simple_cpu.cc:
    each system provides its own init script
kern/tru64/dump_mbuf.cc:
kern/tru64/printf.cc:
    Stick this in a namespace

--HG--
extra : convert_revision : 9f74527ed2ff8010431d9aff34357aaecc1fb3f6
2003-10-14 12:19:59 -04:00
Steve Reinhardt
25693e9e69 Make include paths explicit and update makefile accordingly.
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/arguments.cc:
arch/alpha/arguments.hh:
arch/alpha/ev5.cc:
arch/alpha/ev5.hh:
arch/alpha/fake_syscall.cc:
arch/alpha/faults.cc:
arch/alpha/isa_desc:
arch/alpha/isa_traits.hh:
arch/alpha/osfpal.cc:
arch/alpha/vtophys.cc:
arch/alpha/vtophys.hh:
base/circlebuf.cc:
base/compression/lzss_compression.cc:
base/compression/lzss_compression.hh:
base/cprintf.cc:
base/cprintf.hh:
base/fast_alloc.cc:
base/fifo_buffer.cc:
base/fifo_buffer.hh:
base/hashmap.hh:
base/hostinfo.cc:
base/hostinfo.hh:
base/hybrid_pred.cc:
base/hybrid_pred.hh:
base/inet.cc:
base/inet.hh:
base/inifile.cc:
base/inifile.hh:
base/intmath.cc:
base/loader/aout_object.cc:
base/loader/aout_object.hh:
base/loader/ecoff_object.cc:
base/loader/ecoff_object.hh:
base/loader/elf_object.cc:
base/loader/elf_object.hh:
base/loader/exec_aout.h:
base/loader/exec_ecoff.h:
base/loader/object_file.cc:
base/loader/object_file.hh:
base/loader/symtab.cc:
base/loader/symtab.hh:
base/misc.cc:
base/misc.hh:
base/pollevent.cc:
base/pollevent.hh:
base/random.cc:
base/random.hh:
base/range.hh:
base/remote_gdb.cc:
base/remote_gdb.hh:
base/res_list.hh:
base/sat_counter.cc:
base/sat_counter.hh:
base/sched_list.hh:
base/socket.cc:
base/statistics.cc:
base/statistics.hh:
base/str.cc:
base/trace.cc:
base/trace.hh:
cpu/base_cpu.cc:
cpu/base_cpu.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/exetrace.cc:
cpu/exetrace.hh:
cpu/intr_control.cc:
cpu/intr_control.hh:
cpu/memtest/memtest.cc:
cpu/memtest/memtest.hh:
cpu/pc_event.cc:
cpu/pc_event.hh:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/static_inst.cc:
cpu/static_inst.hh:
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/console.cc:
dev/console.hh:
dev/disk_image.cc:
dev/disk_image.hh:
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherdump.cc:
dev/etherdump.hh:
dev/etherint.cc:
dev/etherint.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/etherpkt.hh:
dev/ethertap.cc:
dev/ethertap.hh:
dev/simple_disk.cc:
dev/simple_disk.hh:
kern/tru64/tru64_syscalls.cc:
kern/tru64/tru64_syscalls.hh:
sim/debug.cc:
sim/eventq.cc:
sim/eventq.hh:
sim/main.cc:
sim/param.cc:
sim/param.hh:
sim/prog.cc:
sim/prog.hh:
sim/serialize.cc:
sim/serialize.hh:
sim/sim_events.cc:
sim/sim_events.hh:
sim/sim_object.cc:
sim/sim_object.hh:
sim/sim_time.cc:
sim/system.cc:
sim/system.hh:
sim/universe.cc:
test/circletest.cc:
test/cprintftest.cc:
test/initest.cc:
test/nmtest.cc:
test/offtest.cc:
test/paramtest.cc:
test/rangetest.cc:
test/stattest.cc:
test/strnumtest.cc:
test/symtest.cc:
test/tokentest.cc:
test/tracetest.cc:
util/tap/tap.cc:
    Make include paths explicit.

--HG--
extra : convert_revision : 941cbdc591fd4d3d1d9f095cd58fc23dd2d73840
2003-10-10 11:09:00 -07:00
Steve Reinhardt
52b31ea0a6 File moves for the reorg. Tree is in broken state until I commit the makefile and
#include changes.

--HG--
rename : sim/cache/lzss_compression.cc => base/compression/lzss_compression.cc
rename : sim/cache/lzss_compression.hh => base/compression/lzss_compression.hh
rename : sim/cache/null_compression.hh => base/compression/null_compression.hh
rename : sim/hybrid_pred.cc => base/hybrid_pred.cc
rename : sim/hybrid_pred.hh => base/hybrid_pred.hh
rename : base/aout_object.cc => base/loader/aout_object.cc
rename : base/aout_object.hh => base/loader/aout_object.hh
rename : base/coff_sym.h => base/loader/coff_sym.h
rename : base/coff_symconst.h => base/loader/coff_symconst.h
rename : base/ecoff_object.cc => base/loader/ecoff_object.cc
rename : base/ecoff_object.hh => base/loader/ecoff_object.hh
rename : base/elf_object.cc => base/loader/elf_object.cc
rename : base/elf_object.hh => base/loader/elf_object.hh
rename : base/exec_aout.h => base/loader/exec_aout.h
rename : base/exec_ecoff.h => base/loader/exec_ecoff.h
rename : base/object_file.cc => base/loader/object_file.cc
rename : base/object_file.hh => base/loader/object_file.hh
rename : base/symtab.cc => base/loader/symtab.cc
rename : base/symtab.hh => base/loader/symtab.hh
rename : sim/predictor.hh => base/predictor.hh
rename : sim/sat_counter.cc => base/sat_counter.cc
rename : sim/sat_counter.hh => base/sat_counter.hh
rename : sim/base_cpu.cc => cpu/base_cpu.cc
rename : sim/base_cpu.hh => cpu/base_cpu.hh
rename : sim/exec_context.cc => cpu/exec_context.cc
rename : sim/exec_context.hh => cpu/exec_context.hh
rename : sim/exetrace.cc => cpu/exetrace.cc
rename : sim/exetrace.hh => cpu/exetrace.hh
rename : sim/op_class.hh => cpu/full_cpu/op_class.hh
rename : sim/smt.hh => cpu/full_cpu/smt.hh
rename : sim/inst_seq.hh => cpu/inst_seq.hh
rename : sim/intr_control.cc => cpu/intr_control.cc
rename : sim/intr_control.hh => cpu/intr_control.hh
rename : sim/memtest.cc => cpu/memtest/memtest.cc
rename : sim/memtest.hh => cpu/memtest/memtest.hh
rename : sim/pc_event.cc => cpu/pc_event.cc
rename : sim/pc_event.hh => cpu/pc_event.hh
rename : sim/simple_cpu.cc => cpu/simple_cpu/simple_cpu.cc
rename : sim/simple_cpu.hh => cpu/simple_cpu/simple_cpu.hh
rename : sim/static_inst.cc => cpu/static_inst.cc
rename : sim/static_inst.hh => cpu/static_inst.hh
extra : convert_revision : 05bd41acb2a424f1a38609fd4ac6df681bb479d6
2003-10-10 09:57:26 -07:00
Renamed from sim/simple_cpu.cc (Browse further)