Ali Saidi
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dcaa0668ae
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ARM: Make the TLB a little bit faster by moving most recently used items to front of list
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2010-10-01 16:04:04 -05:00 |
|
Ali Saidi
|
521d68c82a
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ARM: Implement functional virtual to physical address translation
for debugging and program introspection.
|
2010-10-01 16:03:27 -05:00 |
|
Gene Wu
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d6736384b2
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MEM: Make CLREX a first class request operation and clear locks in caches when it in received
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2010-08-23 11:18:41 -05:00 |
|
Gene Wu
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23626d99af
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ARM: Make sure that software prefetch instructions can't change the state of the TLB
|
2010-08-23 11:18:41 -05:00 |
|
Gene Wu
|
f29e09746a
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ARM: Fix Uncachable TLB requests and decoding of xn bit
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2010-08-23 11:18:41 -05:00 |
|
Gene Wu
|
aa601750f8
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ARM: For non-cachable accesses set the UNCACHABLE flag
|
2010-08-23 11:18:41 -05:00 |
|
Gene Wu
|
1f032ad345
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ARM: Implement CLREX
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2010-08-23 11:18:41 -05:00 |
|
Nathan Binkert
|
86a93fe7b9
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stats: only consider a formula initialized if there is a formula
|
2010-06-15 01:18:36 -07:00 |
|
Dam Sunwoo
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4325519fc5
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ARM: Allow multiple outstanding TLB walks to queue.
|
2010-06-02 12:58:18 -05:00 |
|
Ali Saidi
|
2bad5138e4
|
ARM TLB: Fix bug in memAttrs getting a bogus thread context
|
2010-06-02 12:58:18 -05:00 |
|
Dam Sunwoo
|
6b00c7fa22
|
ARM: Support table walks in timing mode.
|
2010-06-02 12:58:18 -05:00 |
|
Dam Sunwoo
|
6c8dd32fa4
|
ARM: Added support for Access Flag and some CP15 regs (V2PCWPR, V2PCWPW, V2PCWUR, V2PCWUW,...)
|
2010-06-02 12:58:18 -05:00 |
|
Ali Saidi
|
c1e1de8d69
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ARM: Some TLB bug fixes.
|
2010-06-02 12:58:16 -05:00 |
|
Ali Saidi
|
cb9936cfde
|
ARM: Implement the ARM TLB/Tablewalker. Needs performance improvements.
|
2010-06-02 12:58:16 -05:00 |
|
Ali Saidi
|
3aea20d143
|
ARM: Start over with translation from Alpha code as opposed to something that has cruft from 4 different ISAs.
|
2010-06-02 12:58:16 -05:00 |
|
Gabe Black
|
527b735cfc
|
ARM: Implement and update the DFSR and IFSR registers on faults.
|
2010-06-02 12:58:14 -05:00 |
|
Gabe Black
|
683421e0c6
|
ARM: Warn about not implementing MPU translation, not panic about MMU.
We'll start out with a stbu version of PMSA and switch over to VMSA for the
full implementation.
|
2010-06-02 12:58:10 -05:00 |
|
Gabe Black
|
1d5233958a
|
ARM: Implement the V7 version of alignment checking.
|
2010-06-02 12:58:10 -05:00 |
|
Gabe Black
|
9ef82c0bc4
|
ARM: Track the current ISA mode using the PC.
|
2010-06-02 12:57:59 -05:00 |
|
Ali Saidi
|
1470dae8e9
|
ARM: Boilerplate full-system code.
--HG--
rename : src/arch/sparc/interrupts.hh => src/arch/arm/interrupts.hh
rename : src/arch/sparc/kernel_stats.hh => src/arch/arm/kernel_stats.hh
rename : src/arch/sparc/stacktrace.cc => src/arch/arm/stacktrace.cc
rename : src/arch/sparc/system.cc => src/arch/arm/system.cc
rename : src/arch/sparc/system.hh => src/arch/arm/system.hh
rename : src/dev/sparc/T1000.py => src/dev/arm/Versatile.py
rename : src/dev/sparc/t1000.cc => src/dev/arm/versatile.cc
rename : src/dev/sparc/t1000.hh => src/dev/arm/versatile.hh
|
2009-11-17 18:02:08 -06:00 |
|
Steve Reinhardt
|
1c28004654
|
Clean up some inconsistencies with Request flags.
|
2009-08-01 22:50:13 -07:00 |
|
Nathan Binkert
|
50f1570352
|
arm: Unify the ARM tlb. We forgot about this when we did the rest.
This code compiles, but there are no tests still
|
2009-04-21 15:40:25 -07:00 |
|
Gabe Black
|
d080581db1
|
Merge ARM into the head. ARM will compile but may not actually work.
|
2009-04-06 10:19:36 -07:00 |
|
Stephen Hines
|
7a7c4c5fca
|
arm: add ARM support to M5
|
2009-04-05 18:53:15 -07:00 |
|