Gabe Black
d79a591608
X86: Add a format to handle string instructions which can use the repe and repne prefixes.
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--HG--
extra : convert_revision : 205fbbb947258bc0ef2915e22d5b32a3df1a1ce2
2007-08-07 15:23:01 -07:00
Gabe Black
31a862b8f1
X86: missed a file which adds a "fold" bit.
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--HG--
extra : convert_revision : 2c8eea425221d069a9bb888c8f18839843061899
2007-07-30 13:25:38 -07:00
Gabe Black
cfadef74d1
x86 fixes
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Make the emulation environment consider the rex prefix.
Implement and hook in forms of j, jmp, cmp, syscall, movzx
Added a format for an instruction to carry a call to the SE mode syscalls system
Made memory instructions which refer to the rip do so directly
Made the operand size overridable in the microassembly
Made the "ext" field of register operations 16 bits to hold a sparse encoding of flags to set or conditions to predicate on
Added an explicit "rax" operand for the syscall format
Implemented syscall returns.
--HG--
extra : convert_revision : ae84bd8c6a1d400906e17e8b8c4185f2ebd4c5f2
2007-07-19 15:15:47 -07:00
Gabe Black
17f3da6c29
Fix the panic in the "error" format for x86,
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--HG--
extra : convert_revision : bd0715b5b63665f9160082d67c5b5d90d2405c5c
2007-07-18 17:43:30 -07:00
Gabe Black
4f7809d5e6
Pull some hard coded base classes out of the isa description.
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--HG--
rename : src/arch/x86/isa/base.isa => src/arch/x86/isa/outputblock.isa
extra : convert_revision : 7954e7d5eea3b5966c9e273a08bcd169a39f380c
2007-07-14 17:14:19 -07:00
Gabe Black
77aa98d0f8
Implement rip relative addressing and put in some missing loads and stores.
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--HG--
extra : convert_revision : 99053414cef40f13c5226871a72909b2622d8c26
2007-06-20 19:08:04 +00:00
Gabe Black
866cc8214b
Implement a handful more instructions and differentiate macroops based on the operand types they expect.
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--HG--
extra : convert_revision : f9c8e694a8c0eb33b988657dca03ab495b65bee8
2007-06-14 20:52:22 +00:00
Gabe Black
7a52faa39b
Use objects to pass around output code, and fix/implement a few things.
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src/arch/x86/isa/formats/multi.isa:
Make the formats use objects to pass around output code.
--HG--
extra : convert_revision : 428915bda22e848befac15097f56375c1818426e
2007-06-12 16:25:47 +00:00
Gabe Black
b9c38660ef
Fix up a potentially misleading comment.
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--HG--
extra : convert_revision : 58d37d8cc8e41c9640038d6dddae4cb5649638aa
2007-06-08 17:30:16 +00:00
Gabe Black
1f7ed5b7b4
Big changes to use the new microcode assembler.
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--HG--
extra : convert_revision : 7d1a43c5791a2e7e30533746da3dd7036a5b8799
2007-06-08 16:09:43 +00:00
Gabe Black
9f4ebf9156
Reworked x86 a bit
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--HG--
extra : convert_revision : def1a30e54b59c718c451a631a1be6f8e787e843
2007-04-10 17:25:15 +00:00
Gabe Black
2a1c102f25
Refactored the x86 isa description some more. There should be more seperation between x86 specific parts, and those parts which are implemented in the isa description but could eventually be moved elsewhere.
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--HG--
rename : src/arch/x86/isa/formats/macroop.isa => src/arch/x86/isa/macroop.isa
extra : convert_revision : 5ab40eedf574fce438d9fe90e00a496dc95c8bcf
2007-04-06 16:00:56 +00:00
Gabe Black
47c24ff07a
Clean up the macroop code.
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--HG--
extra : convert_revision : 3cf83c3e038fece6190dbb91f56deb0498c9a70d
2007-04-06 15:15:36 +00:00
Gabe Black
4285990a96
Reworking how x86's isa description works. I'm adopting the following definitions to make figuring out what's what a little easier:
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MicroOp: A single operation actually implemented in hardware.
MacroOp: A collection of microops which are executed as a unit.
Instruction: An architected instruction which can be implemented with a macroop or a microop.
--HG--
extra : convert_revision : 1cfc8409cc686c75220767839f55a30551aa6f13
2007-04-04 14:31:59 +00:00
Gabe Black
61c56ffeaf
A batch of changes and fixes. Macroops are now generated automatically, multiops do alot more of what they're supposed to (excluding memory operands), and microops are slightly more implemented.
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--HG--
extra : convert_revision : 518059f47e11df50aa450d4a322ef2ac069c99c9
2007-04-03 15:01:09 +00:00
Gabe Black
7fcc9d2106
Made the MultiOp format do a little more. It now sets up single microop instructions to return an instance of the right class. The code to decode register numbers and generate loads and stores still needs to be added. Also, a syntax for specifying operands as sources, destinations, or both needs to be established. Multipl microop instructions are also not handled, pending real macroop generation support.
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--HG--
extra : convert_revision : 1a0a4b36afce8255e23e3cdd7a85c1392dda5f72
2007-03-29 17:57:19 +00:00
Gabe Black
bbffaa8ee0
Start implementing groups of instructions which do the same thing on different sets of inputs.
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--HG--
extra : convert_revision : 6a5be61831588f801965dd4e80cb52f28911c320
2007-03-21 21:07:43 +00:00
Gabe Black
0a80d06dea
Break out the one and two byte opcodes into different files. Also change what bits decode is done on to reflect where clumps of instructions are.
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--HG--
extra : convert_revision : 8768676eac25e6a4f0dc50ce2dc576bdcdd6e025
2007-03-21 19:19:53 +00:00
Gabe Black
a2b56088fb
Make the predecoder an object with it's own switched header file. Start adding predecoding functionality to x86.
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src/arch/SConscript:
src/arch/alpha/utility.hh:
src/arch/mips/utility.hh:
src/arch/sparc/utility.hh:
src/cpu/base.hh:
src/cpu/o3/fetch.hh:
src/cpu/o3/fetch_impl.hh:
src/cpu/simple/atomic.cc:
src/cpu/simple/base.cc:
src/cpu/simple/base.hh:
src/cpu/static_inst.hh:
src/arch/alpha/predecoder.hh:
src/arch/mips/predecoder.hh:
src/arch/sparc/predecoder.hh:
Make the predecoder an object with it's own switched header file.
--HG--
extra : convert_revision : 77206e29089130e86b97164c30022a062699ba86
2007-03-15 02:47:42 +00:00
Gabe Black
a41b86ba01
Stub decoder. This is probably even farther from finished than it looks...
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--HG--
extra : convert_revision : a39a158fec4560f6eb7a6987592c473677c0b1ba
2007-03-05 16:16:28 +00:00
