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Author SHA1 Message Date
Nathan Binkert
8522474318 Merge zizzer.eecs.umich.edu:/bk/m5 
into crampon.my.domain:/z/binkertn/research/m5/head

--HG--
extra : convert_revision : eb0e28e22549f875cef25043491a30c2755676ed
 2005-06-05 02:26:18 -04:00
Steve Reinhardt
b30494f35d Merge zizzer:/bk/m5 into vm1.reinhardt.house:/z/stever/bk/m5 
--HG--
extra : convert_revision : 6f1e9b2650ec9f9a396ee7826e9abffab24848b8
 2005-06-05 02:26:17 -04:00
Steve Reinhardt
966ae300db Get rid of a bunch of obsolete utilities. 
--HG--
extra : convert_revision : 6ffe39211b6c9cc55f2decd2f1fbdba9ea0fabcd
 2005-06-05 02:26:06 -04:00
Ron Dreslinski
07b1ecd1a3 Defualt only build LRU cache, speed compile 
--HG--
extra : convert_revision : 871d5b79de2cd3da1fb618ff09063aa4a00c39ac
 2005-06-05 02:24:26 -04:00
Steve Reinhardt
4f8cab04d4 Actually commit new doxygen stats doc. 
--HG--
extra : convert_revision : 8397036847797c116ce1bcbdb30636e70326c6d6
 2005-06-05 02:01:36 -04:00
Steve Reinhardt
d4559c32e4 Add licenses in python dir. 
python/m5/__init__.py:
python/m5/convert.py:
python/m5/multidict.py:
python/m5/smartdict.py:
    Add license.

--HG--
extra : convert_revision : 825dcad94e13b18aadc7188053ad1999a0219eae
 2005-06-05 01:57:57 -04:00
Kevin Lim
e14bff46b6 Update for ISCA release. 
--HG--
extra : convert_revision : 5c3fd17ba0a5173b22d2977b278013ef50d78a68
 2005-06-05 01:50:35 -04:00
Ron Dreslinski
b2e4b90911 Merge zizzer:/bk/m5 into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/m5 
--HG--
extra : convert_revision : 21175b3a16c1da736cf7f6fba1c327a809f5ef79
 2005-06-05 01:36:12 -04:00
Ron Dreslinski
8512948ceb update for ISCA release 
--HG--
extra : convert_revision : ab97c34b76c253267d48479bd043963be8b7fe4b
 2005-06-05 01:35:55 -04:00
Nathan Binkert
3e5e3e2d28 make all of the turbolaser stuff only compile if ALPHA_TLASER 
is defined.

build/SConstruct:
    Default ALPHA_TLASER to false
dev/uart8250.cc:
    fix paths

--HG--
extra : convert_revision : 3616b5b4b9060860a73568a4ed4f1e8eb991938f
 2005-06-05 01:24:17 -04:00
Nathan Binkert
8f1348a21d Merge zizzer.eecs.umich.edu:/bk/m5 
into crampon.my.domain:/z/binkertn/research/m5/head

--HG--
extra : convert_revision : cf1b2ab4544492aced52c0012c3a67fee188b683
 2005-06-05 01:24:16 -04:00
Ali Saidi
5657c1dbec moved uart8530 to encumbered directory 
--HG--
extra : convert_revision : 353e5591df9bbe5a915d226068fb2e406441d3b5
 2005-06-05 01:24:15 -04:00
Ali Saidi
3011a7ed0b Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5-clean 
--HG--
extra : convert_revision : 0c339eb7574f59665690f7e8457eff0b21e3c4c9
 2005-06-05 01:22:33 -04:00
Ali Saidi
adce616cfe split uart into urt8250 and uart8530 
fix some doxygen comments

SConscript:
    Added split uart files
dev/ns_gige.cc:
dev/ns_gige.hh:
dev/ns_gige_reg.h:
dev/tsunami.cc:
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
dev/tsunamireg.h:
    fix doxgyen file comment
dev/uart.cc:
dev/uart.hh:
python/m5/objects/Uart.py:
    split uart into urt8250 and uart8530

--HG--
extra : convert_revision : 2e70aad892a37620d7909017648bca6d7d69d678
 2005-06-05 01:22:21 -04:00
Steve Reinhardt
715176d450 Merge zizzer:/bk/m5 into vm1.reinhardt.house:/z/stever/bk/m5 
--HG--
extra : convert_revision : 2ed9e6c9875903a2cde296155b7d1bee10fea3de
 2005-06-05 01:18:18 -04:00
Steve Reinhardt
2dd71c7736 Import stats document from html. 
--HG--
extra : convert_revision : 0117ca5b2095b18fd079153a4f0847c9158acd9d
 2005-06-05 01:17:29 -04:00
Nathan Binkert
4f654fed0e insn_fifo isn't used 
--HG--
extra : convert_revision : 2a0c72a4d65a5160ce1317968e565704093291a2
 2005-06-05 00:45:11 -04:00
Nathan Binkert
fb1282de1a Merge zizzer.eecs.umich.edu:/bk/m5 
into crampon.my.domain:/z/binkertn/research/m5/head

--HG--
extra : convert_revision : b0c9b044b44a1bfc4cded2ebfa240b799dd4a5a0
 2005-06-05 00:45:10 -04:00
Steve Reinhardt
87d27637aa Minor format tweaks on config file documentation. 
--HG--
extra : convert_revision : ab88d823d6420e3cc3fc37d0b634947df384b631
 2005-06-05 00:45:09 -04:00
Steve Reinhardt
9e4ba48543 Rewrite config file documentation for Python config. 
--HG--
extra : convert_revision : 24525d1f6e119e30943c036ffafae14c5ea25f2d
 2005-06-05 00:08:03 -04:00
Ali Saidi
8bbaaa7478 Fix doxgyen comments 
Use openbsd ide/atapi header files

dev/alpha_console.cc:
dev/alpha_console.hh:
dev/baddev.cc:
dev/baddev.hh:
dev/disk_image.cc:
dev/disk_image.hh:
dev/tsunami_cchip.hh:
dev/tsunami_io.hh:
dev/tsunami_pchip.hh:
    Fix Doxygen comments
dev/ide_disk.cc:
    Use BSD atapi/ide header files
dev/ide_disk.hh:
    use ide/atapi header files

--HG--
extra : convert_revision : a15e40c7d7cc52af6867821e9574ba5c47021721
 2005-06-04 23:56:53 -04:00
Lisa Hsu
964b5aaed8 Merge zizzer:/bk/m5 into zed.eecs.umich.edu:/z/hsul/work/m5/clean 
--HG--
extra : convert_revision : e3646dfd2f0844e4be7f5369032f9932eb378fdb
 2005-06-04 23:36:11 -04:00
Lisa Hsu
f92dbaad83 get rid of bad panic. 
--HG--
extra : convert_revision : e4e6ab8f163b3c93ac7c29ab8ac50f369b190dbb
 2005-06-04 23:36:00 -04:00
Steve Reinhardt
8170b4308f Get rid of broken "long help" option. 
--HG--
extra : convert_revision : 8b7c646ce416d2a2a4919acbb87c0b6d65920d42
 2005-06-04 23:13:09 -04:00
Steve Reinhardt
b6fa376790 Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5 
into zizzer.eecs.umich.edu:/z/stever/bk/m5

--HG--
extra : convert_revision : f12cecd1359770061b52e9f57f2aaa809e61115c
 2005-06-04 23:08:49 -04:00
Steve Reinhardt
ed743cb3b0 Clean up to work with recent python config changes. 
configs/splash2/run.py:
    parent is now Parent.
    Need to explicitly instantiate classes.

--HG--
extra : convert_revision : c260fad00ca82cb1032e73af2e5caa2ad013067d
 2005-06-04 23:08:26 -04:00
Nathan Binkert
13c005a8af shuffle files around for new directory structure 
--HG--
rename : cpu/base_cpu.cc => cpu/base.cc
rename : cpu/base_cpu.hh => cpu/base.hh
rename : cpu/beta_cpu/2bit_local_pred.cc => cpu/o3/2bit_local_pred.cc
rename : cpu/beta_cpu/2bit_local_pred.hh => cpu/o3/2bit_local_pred.hh
rename : cpu/beta_cpu/alpha_full_cpu.cc => cpu/o3/alpha_cpu.cc
rename : cpu/beta_cpu/alpha_full_cpu.hh => cpu/o3/alpha_cpu.hh
rename : cpu/beta_cpu/alpha_full_cpu_builder.cc => cpu/o3/alpha_cpu_builder.cc
rename : cpu/beta_cpu/alpha_full_cpu_impl.hh => cpu/o3/alpha_cpu_impl.hh
rename : cpu/beta_cpu/alpha_dyn_inst.cc => cpu/o3/alpha_dyn_inst.cc
rename : cpu/beta_cpu/alpha_dyn_inst.hh => cpu/o3/alpha_dyn_inst.hh
rename : cpu/beta_cpu/alpha_dyn_inst_impl.hh => cpu/o3/alpha_dyn_inst_impl.hh
rename : cpu/beta_cpu/alpha_impl.hh => cpu/o3/alpha_impl.hh
rename : cpu/beta_cpu/alpha_params.hh => cpu/o3/alpha_params.hh
rename : cpu/beta_cpu/bpred_unit.cc => cpu/o3/bpred_unit.cc
rename : cpu/beta_cpu/bpred_unit.hh => cpu/o3/bpred_unit.hh
rename : cpu/beta_cpu/bpred_unit_impl.hh => cpu/o3/bpred_unit_impl.hh
rename : cpu/beta_cpu/btb.cc => cpu/o3/btb.cc
rename : cpu/beta_cpu/btb.hh => cpu/o3/btb.hh
rename : cpu/beta_cpu/comm.hh => cpu/o3/comm.hh
rename : cpu/beta_cpu/commit.cc => cpu/o3/commit.cc
rename : cpu/beta_cpu/commit.hh => cpu/o3/commit.hh
rename : cpu/beta_cpu/commit_impl.hh => cpu/o3/commit_impl.hh
rename : cpu/beta_cpu/full_cpu.cc => cpu/o3/cpu.cc
rename : cpu/beta_cpu/full_cpu.hh => cpu/o3/cpu.hh
rename : cpu/beta_cpu/cpu_policy.hh => cpu/o3/cpu_policy.hh
rename : cpu/beta_cpu/decode.cc => cpu/o3/decode.cc
rename : cpu/beta_cpu/decode.hh => cpu/o3/decode.hh
rename : cpu/beta_cpu/decode_impl.hh => cpu/o3/decode_impl.hh
rename : cpu/beta_cpu/fetch.cc => cpu/o3/fetch.cc
rename : cpu/beta_cpu/fetch.hh => cpu/o3/fetch.hh
rename : cpu/beta_cpu/fetch_impl.hh => cpu/o3/fetch_impl.hh
rename : cpu/beta_cpu/free_list.cc => cpu/o3/free_list.cc
rename : cpu/beta_cpu/free_list.hh => cpu/o3/free_list.hh
rename : cpu/beta_cpu/iew.cc => cpu/o3/iew.cc
rename : cpu/beta_cpu/iew.hh => cpu/o3/iew.hh
rename : cpu/beta_cpu/iew_impl.hh => cpu/o3/iew_impl.hh
rename : cpu/beta_cpu/inst_queue.cc => cpu/o3/inst_queue.cc
rename : cpu/beta_cpu/inst_queue.hh => cpu/o3/inst_queue.hh
rename : cpu/beta_cpu/inst_queue_impl.hh => cpu/o3/inst_queue_impl.hh
rename : cpu/beta_cpu/mem_dep_unit.cc => cpu/o3/mem_dep_unit.cc
rename : cpu/beta_cpu/mem_dep_unit.hh => cpu/o3/mem_dep_unit.hh
rename : cpu/beta_cpu/mem_dep_unit_impl.hh => cpu/o3/mem_dep_unit_impl.hh
rename : cpu/beta_cpu/ras.cc => cpu/o3/ras.cc
rename : cpu/beta_cpu/ras.hh => cpu/o3/ras.hh
rename : cpu/beta_cpu/regfile.hh => cpu/o3/regfile.hh
rename : cpu/beta_cpu/rename.cc => cpu/o3/rename.cc
rename : cpu/beta_cpu/rename.hh => cpu/o3/rename.hh
rename : cpu/beta_cpu/rename_impl.hh => cpu/o3/rename_impl.hh
rename : cpu/beta_cpu/rename_map.cc => cpu/o3/rename_map.cc
rename : cpu/beta_cpu/rename_map.hh => cpu/o3/rename_map.hh
rename : cpu/beta_cpu/rob.cc => cpu/o3/rob.cc
rename : cpu/beta_cpu/rob.hh => cpu/o3/rob.hh
rename : cpu/beta_cpu/rob_impl.hh => cpu/o3/rob_impl.hh
rename : cpu/beta_cpu/sat_counter.cc => cpu/o3/sat_counter.cc
rename : cpu/beta_cpu/sat_counter.hh => cpu/o3/sat_counter.hh
rename : cpu/beta_cpu/store_set.cc => cpu/o3/store_set.cc
rename : cpu/beta_cpu/store_set.hh => cpu/o3/store_set.hh
rename : cpu/beta_cpu/tournament_pred.cc => cpu/o3/tournament_pred.cc
rename : cpu/beta_cpu/tournament_pred.hh => cpu/o3/tournament_pred.hh
rename : cpu/ooo_cpu/ooo_cpu.cc => cpu/ozone/cpu.cc
rename : cpu/ooo_cpu/ooo_cpu.hh => cpu/ozone/cpu.hh
rename : cpu/ooo_cpu/ooo_impl.hh => cpu/ozone/cpu_impl.hh
rename : cpu/ooo_cpu/ea_list.cc => cpu/ozone/ea_list.cc
rename : cpu/ooo_cpu/ea_list.hh => cpu/ozone/ea_list.hh
rename : cpu/simple_cpu/simple_cpu.cc => cpu/simple/cpu.cc
rename : cpu/simple_cpu/simple_cpu.hh => cpu/simple/cpu.hh
rename : cpu/full_cpu/smt.hh => cpu/smt.hh
rename : cpu/full_cpu/op_class.hh => encumbered/cpu/full/op_class.hh
extra : convert_revision : c4a891d8d6d3e0e9e5ea56be47d851da44d8c032
 2005-06-04 20:50:10 -04:00
Nathan Binkert
5a94e6f2cc Merge zizzer.eecs.umich.edu:/bk/m5 
into crampon.my.domain:/z/binkertn/research/m5/head

--HG--
extra : convert_revision : 7e9a7c1abf90cc1545d63caf5d6a06351ece36b5
 2005-06-04 19:02:53 -04:00
Ali Saidi
764e9aa9be Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5-clean 
--HG--
extra : convert_revision : cce752079ba1ae9d4043df959dc448d815e598b1
 2005-06-04 19:02:52 -04:00
Ali Saidi
e242a35853 Fix monet configuration 
--HG--
extra : convert_revision : fe053d8fe69cc8731161a875cbf8b78cda48e4b1
 2005-06-04 19:00:32 -04:00
Nathan Binkert
673bd49b1d Remove the inorder CPU 
--HG--
extra : convert_revision : 626aad449df9370383becb8e14f4cbf406b5b376
 2005-06-04 18:41:44 -04:00
Steve Reinhardt
609cacc3da Get rid of vestiges of .mpy file handling. 
--HG--
extra : convert_revision : 309b051be3473e2d42d3200c1af84227d01b5900
 2005-06-04 18:41:43 -04:00
Nathan Binkert
b46730c7ec BaseSystem -> System 
Make System an object that can be instantiated.  For operating
systems that don't need any OS specific hacks.

python/m5/objects/AlphaConsole.py:
python/m5/objects/BaseCPU.py:
python/m5/objects/Tsunami.py:
    BaseSystem -> System

--HG--
rename : python/m5/objects/BaseSystem.py => python/m5/objects/System.py
extra : convert_revision : e5d12db02abef1b0eda720b50dd2c09cb1ac5232
 2005-06-04 14:19:05 -04:00
Nathan Binkert
6b6445eeb9 more portable 
arch/alpha/alpha_tru64_process.cc:
    Sort #includes
    Make code more portable. g++ doesn't seem to always like
    struct ::stat (and others). So, we typedef stat outside of
    the namespace as something else and use the typedef
base/hostinfo.cc:
    use snprintf to quell warning
base/inifile.cc:
    use strncpy to quell warning
base/stats/events.cc:
    don't use strcpy
cpu/beta_cpu/btb.cc:
    use FloorLog2 instead of log2
cpu/beta_cpu/comm.hh:
cpu/beta_cpu/inst_queue.hh:
cpu/beta_cpu/sat_counter.hh:
    use sim/host.hh instead of stdint.h

--HG--
extra : convert_revision : 59bd9235dda74e72a8b6a70b3f3a981840384f3f
 2005-06-04 14:16:04 -04:00
Nathan Binkert
372b5e706c Make m5.fast work 
base/loader/elf_object.cc:
    elf_version is an odd function.  Don't use assert since it
    has a necessary side effect.

--HG--
extra : convert_revision : 8c48f91afe6c7ff5030ac1a534dcda7e2e0c5c57
 2005-06-03 21:47:30 -04:00
Steve Reinhardt
af3add2e33 Bug fix & cleanup in config code. 
python/m5/config.py:
    Bug fix: code was silently converting between
    incompatible SimObject types as an unintended
    side-effect of the object cloning support.

--HG--
extra : convert_revision : 236f4fe5370f2eddf8af8fab68e2b83dccc34305
 2005-06-03 16:21:37 -04:00
Steve Reinhardt
22eccce34b Additions/fixes for Tru64 syscall emulation. 
We can now run the SimpleScalar wupwise binary
to completion on the test input.
Didn't have time to do more testing, but I fixed
a major problem w/getdirentries that should help
a lot more programs run.

arch/alpha/alpha_tru64_process.cc:
    Add truncate, ftruncate, statfs, and fstatfs.
    Add v4.x (pre-F64) stat, fstat, and lstat.
    Add setsysinfo (though all it does is provide more
    specific warning messages).
    Fix subtle but major bug in getdirentries.
sim/syscall_emul.cc:
sim/syscall_emul.hh:
    Add truncate, ftruncate, statfs, and fstatfs.

--HG--
extra : convert_revision : 9037393d00dc49b0074a41603ea647587f5a9ec7
 2005-06-03 16:19:34 -04:00
Nathan Binkert
890e37ecd9 Make m5.fast work when there are no Trace.flags 
--HG--
extra : convert_revision : 05eda14b86311013d3c32ee56f9f52ae94126fb4
 2005-06-03 10:07:27 -04:00
Steve Reinhardt
9bf0961afc Rename builds more descriptively: 
ALPHA -> ALPHA_SE (for Syscall Emulation)
KERNEL -> ALPHA_FS
KERN_TLASER -> ALPHA_FS_TL
Also renamed configs/kernel dir to configs/fullsys.

README:
build/SConstruct:
    Rename builds more descriptively.

--HG--
extra : convert_revision : f2bffb3ad0fc5068cc7fa20661ed9e4e7bc5b202
 2005-06-02 16:15:43 -04:00
Nathan Binkert
ba73e1cc39 clean up command line stuff 
sim/main.cc:
    Clean uo usage output and print usage when no options are given
    Don't accept mpy files anymore since we don't use them.

--HG--
extra : convert_revision : c3b16f602f301d2de12547285334c0037d829998
 2005-06-02 11:20:31 -04:00
Nathan Binkert
0ee75f27b8 Fix-up some config issues 
python/m5/config.py:
    Make NetworkBandwidth and MemoryBandwidth work
python/m5/objects/Ethernet.py:
    Make 1Gbps default for ethernet

--HG--
extra : convert_revision : 59e62f7e62624356ae8d7304598617f60667f040
 2005-06-02 11:19:01 -04:00
Nathan Binkert
960672719a update copyrights that are spit out on the console. 
--HG--
extra : convert_revision : e927fd48d2cc82d20478baeb05f58dce07a800e7
 2005-06-02 11:17:45 -04:00
Steve Reinhardt
9238ceab25 More de-SimpleScalarization of cache code. 
--HG--
extra : convert_revision : b310a0e8a02487302d4861cfa08543b6047a0ff7
 2005-06-02 01:03:17 -04:00
Steve Reinhardt
e5b4bf28d9 Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5 
into zizzer.eecs.umich.edu:/z/stever/bk/m5

--HG--
extra : convert_revision : 71d4611b6d9496d3237c4d0cd46912a108ec8653
 2005-06-02 00:08:09 -04:00
Erik Hallnor
f15d988a79 Change lru/iic parameter checks for licensing. 
--HG--
extra : convert_revision : 5d5ae086d5e7981d49c68a2283ad2c08e27b4399
 2005-06-01 23:14:10 -04:00
Steve Reinhardt
a69b418550 Get rid of unused sim/int_stats.* files. 
--HG--
extra : convert_revision : 6b86e97fbadbd6f00c0bc52f0ab07fd7741f9818
 2005-06-01 22:09:22 -04:00
Steve Reinhardt
62fa781fee Rename sim/universe.{cc,hh} to root.{cc,hh} (since the 
object defined there was renamed Root long ago).

SConscript:
arch/alpha/alpha_linux_process.cc:
arch/alpha/alpha_tru64_process.cc:
base/misc.cc:
base/pollevent.cc:
base/pollevent.hh:
base/stats/events.cc:
base/trace.hh:
cpu/beta_cpu/fetch_impl.hh:
cpu/beta_cpu/full_cpu.cc:
cpu/beta_cpu/inst_queue_impl.hh:
cpu/pc_event.cc:
cpu/static_inst.cc:
dev/etherbus.cc:
dev/etherdump.cc:
dev/etherlink.cc:
dev/ide_disk.cc:
dev/pcidev.cc:
sim/builder.cc:
sim/eventq.cc:
sim/main.cc:
sim/root.cc:
sim/stat_control.cc:
    Rename sim/universe.{cc,hh} to root.{cc,hh}.

--HG--
rename : sim/universe.cc => sim/root.cc
extra : convert_revision : b8699e81e285253d66da75412e7bb2c251c0389a
 2005-06-01 21:59:27 -04:00
Steve Reinhardt
8031cd93b5 Standardize clock parameter names to 'clock'. 
Fix description for Bus clock_ratio (no longer a ratio).
Add Clock param type (generic Frequency or Latency).

cpu/base_cpu.cc:
cpu/base_cpu.hh:
cpu/beta_cpu/alpha_full_cpu_builder.cc:
cpu/simple_cpu/simple_cpu.cc:
dev/ide_ctrl.cc:
dev/ns_gige.cc:
dev/ns_gige.hh:
dev/pciconfigall.cc:
dev/sinic.cc:
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
dev/uart.cc:
python/m5/objects/BaseCPU.py:
python/m5/objects/BaseCache.py:
python/m5/objects/BaseSystem.py:
python/m5/objects/Bus.py:
python/m5/objects/Ethernet.py:
python/m5/objects/Root.py:
sim/universe.cc:
    Standardize clock parameter names to 'clock'.
    Fix description for Bus clock_ratio (no longer a ratio).
python/m5/config.py:
    Minor tweaks on Frequency/Latency:
    - added new Clock param type to avoid ambiguities
    - factored out init code into getLatency()
    - made RootFrequency *not* a subclass of Frequency so it
    can't be directly assigned to a Frequency paremeter

--HG--
extra : convert_revision : fc4bb8562df171b454bbf696314cda57e1ec8506
 2005-06-01 21:44:00 -04:00
Steve Reinhardt
3304da9270 Get rid of obsolete simobj/SConscript 
--HG--
extra : convert_revision : 2f2a5e1702a5ad09d80362e25a895e6181b2117c
 2005-06-01 17:14:42 -04:00
Steve Reinhardt
3e7f660401 A few more config updates. Works with regression now. 
configs/splash2/run.py:
    Update file for new config changes.
python/m5/config.py:
    - isParamContext() not defined any more
    - fix bug with re-assigning vectors over scalars
    and vice versa

--HG--
rename : configs/splash2/run.mpy => configs/splash2/run.py
extra : convert_revision : 2eb28a92f8de327f6dfddd01467c61e759275f6b
 2005-06-01 17:08:45 -04:00