Commit graph

13 commits

Author SHA1 Message Date
Nathan Binkert
5eab6c4b41 Make the notion of a global event tick independent of the actual
CPU cycle ticks.  This allows the user to have CPUs of different
frequencies, and also allows frequencies and latencies that are
not evenly divisible by the CPU frequency.  For now, the CPU
frequency is still set to the global frequency, but soon, we'll
hopefully make the global frequency fixed at something like 1THz
and set all other frequencies independently.

arch/alpha/ev5.cc:
    The cycles counter is based on the current cpu cycle.
cpu/base_cpu.cc:
    frequency isn't the cpu parameter anymore, cycleTime is.
cpu/base_cpu.hh:
    frequency isn't the cpu parameter anymore, cycleTime is.
    create several public functions for getting the cpu frequency
    and the numbers of ticks for a given number of cycles, etc.
cpu/memtest/memtest.cc:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/trace/trace_cpu.cc:
    Now that ticks aren't cpu cycles, fixup code to advance
    by the proper number of ticks.
cpu/memtest/memtest.hh:
cpu/trace/trace_cpu.hh:
    Provide a function to get the number of ticks for a given
    number of cycles.
dev/alpha_console.cc:
    Update for changes in the way that frequencies and latencies are
    accessed.  Move some stuff to init()
dev/alpha_console.hh:
    Need a pointer to the system and the cpu to get the frequency
    so we can pass the info to the console code.
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/ethertap.cc:
dev/ide_disk.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
    update for changes in the way bandwidths are passed from
    python to C++ to accomidate the new way that ticks works.
dev/ide_disk.cc:
    update for changes in the way bandwidths are passed from
    python to C++ to accomidate the new way that ticks works.
    Add some extra debugging printfs
dev/platform.cc:
dev/sinic.cc:
dev/sinic.hh:
    outline the constructor and destructor
dev/platform.hh:
    outline the constructor and destructor.
    don't keep track of the interrupt frequency.  Only provide the
    accessor function.
dev/tsunami.cc:
dev/tsunami.hh:
    outline the constructor and destructor
    Don't set the interrupt frequency here.  Get it from the actual device
    that does the interrupting.
dev/tsunami_io.cc:
dev/tsunami_io.hh:
    Make the interrupt interval a configuration parameter.  (And convert
    the interval to the new latency/frequency stuff in the python)
kern/linux/linux_system.cc:
    update for changes in the way bandwidths are passed from
    python to C++ to accomidate the new way that ticks works.
    For now, we must get the boot cpu's frequency as a parameter
    since allowing the system to have a pointer to the boot cpu would
    cause a cycle.
kern/tru64/tru64_system.cc:
    For now, we must get the boot cpu's frequency as a parameter
    since allowing the system to have a pointer to the boot cpu would
    cause a cycle.
python/m5/config.py:
    Fix support for cycle_time relative latencies and frequencies.
    Add support for getting a NetworkBandwidth or a MemoryBandwidth.
python/m5/objects/BaseCPU.mpy:
    All CPUs now have a cycle_time.  The default is the global frequency,
    but it is now possible to set the global frequency to some large value
    (like 1THz) and set each CPU frequency independently.
python/m5/objects/BaseCache.mpy:
python/m5/objects/Ide.mpy:
    Make this a Latency parameter
python/m5/objects/BaseSystem.mpy:
    We need to pass the boot CPU's frequency to the system
python/m5/objects/Ethernet.mpy:
    Update parameter types to use latency and bandwidth types
python/m5/objects/Platform.mpy:
    this frequency isn't needed.  We get it from the clock interrupt.
python/m5/objects/Tsunami.mpy:
    The clock generator should hold the frequency
sim/eventq.hh:
    Need to remove this assertion because the writeback event
    queue is different from the CPU's event queue which can cause
    this assertion to fail.
sim/process.cc:
    Fix comment.
sim/system.hh:
    Struct member to hold the boot CPU's frequency.
sim/universe.cc:
    remove unneeded variable.

--HG--
extra : convert_revision : 51efe4041095234bf458d9b3b0d417f4cae16fdc
2005-04-11 15:32:06 -04:00
Nathan Binkert
9b1e2db811 Clean up CPU stuff and make it use params structs
cpu/base_cpu.cc:
cpu/base_cpu.hh:
    Convert the CPU stuff to use a params struct
cpu/memtest/memtest.cc:
    The memory tester is really not a cpu, so don't derive from
    BaseCPU since it just makes things a pain in the butt.  Keep
    track of max loads in the memtest class now that the base class
    doesn't do it for us.
    Don't have any default parameters.
cpu/memtest/memtest.hh:
    The memory tester is really not a cpu, so don't derive from
    BaseCPU since it just makes things a pain in the butt.  Keep
    track of max loads in the memtest class now that the base class
    doesn't do it for us.
cpu/simple_cpu/simple_cpu.cc:
    Convert to use a params struct.
    remove default parameters
cpu/simple_cpu/simple_cpu.hh:
    convert to use a params struct
cpu/trace/opt_cpu.cc:
cpu/trace/opt_cpu.hh:
cpu/trace/trace_cpu.cc:
cpu/trace/trace_cpu.hh:
    this isn't really a cpu.  don't derive from BaseCPU
objects/MemTest.mpy:
    we only need one max_loads parameter
sim/main.cc:
    Don't check for the number of CPUs since we may be doing something
    else going on.  If we don't have anything to simulate, the
    simulator will exit anyway.

--HG--
extra : convert_revision : 2195a34a9ec90b5414324054ceb3bab643540dd5
2005-02-19 11:46:41 -05:00
Nathan Binkert
8056b9a48a Forgot about the tracing cpus for the changes to the base class
cpu/trace/opt_cpu.cc:
cpu/trace/trace_cpu.cc:
    we don't want to register this cpu since it's not a real cpu

--HG--
extra : convert_revision : 3b87b6ac3dd061018909bf4fdb4e2d611128d07b
2004-11-03 22:30:13 -05:00
Erik Hallnor
867a9b84d9 Bunch of little changes for tracking copies and getting OPT right.
cpu/simple_cpu/simple_cpu.cc:
    Send Copy
cpu/trace/opt_cpu.cc:
    Calculate the block size correctly. Set lookupTable value directly, since the old way only worked for FA caches.
cpu/trace/trace_cpu.cc:
    Don't start events if the hierarchy is in non-event mode.

--HG--
extra : convert_revision : daf2db5ed7428c2fb08652cf76f6fe99d8357db5
2004-10-17 00:07:21 -04:00
Erik Hallnor
72276af49f Make printouts look more like stats.
cpu/trace/opt_cpu.cc:
    Change printout to look more like real stats, should really just make these stats someday.

--HG--
extra : convert_revision : cd5db4657a53abeda0417ca6ba4407d366408358
2004-10-01 16:31:13 -04:00
Erik Hallnor
f2ac7b645f Updates to make traces work correctly in all circumstances. Add opt set associative simulation.
cpu/trace/opt_cpu.cc:
cpu/trace/opt_cpu.hh:
    Add the ability to simulate less than fully-associative opt caches.
cpu/trace/reader/itx_reader.cc:
    Add writeback to the command list.

--HG--
extra : convert_revision : a9c9c4be3358f4083d7e85772620441a3ad809db
2004-09-30 01:46:48 -04:00
Erik Hallnor
34742515f5 Add opt cpu and fix page copy warnings
SConscript:
    Add opt_cpu
cpu/simple_cpu/simple_cpu.cc:
    Fix page spanning copy warning.
cpu/trace/reader/itx_reader.cc:
    Fix reader to return correct address.

--HG--
extra : convert_revision : f03e244971af4197743c7c717d64f21db0ae42d3
2004-09-28 16:55:55 -04:00
Erik Hallnor
1401a06691 Update tracing functionality and add an ITX trace writer.
SConscript:
    Add build support for ITX trace writer
cpu/trace/reader/itx_reader.cc:
    Handle full 36 bit physical addressses.
cpu/trace/reader/itx_reader.hh:
    Need a string header file here
cpu/trace/trace_cpu.cc:
cpu/trace/trace_cpu.hh:
    Modify trace CPU to take a single trace and drive an instruction and data interfaces.

--HG--
extra : convert_revision : 4c81f2f9d9341df41f0ae45e4bda49800a43977c
2004-09-02 11:27:38 -04:00
Ali Saidi
df61a1d3ef updated readme to reflect linux/scons changes
Put correct date in copyright headers based on bk changesets

LICENSE:
    Updated copyright on license file
README:
    Updaded readme to reflect shift to scons and linux support
cpu/trace/reader/ibm_reader.cc:
cpu/trace/reader/ibm_reader.hh:
cpu/trace/reader/itx_reader.cc:
cpu/trace/reader/itx_reader.hh:
cpu/trace/reader/m5_reader.cc:
cpu/trace/reader/m5_reader.hh:
cpu/trace/reader/mem_trace_reader.cc:
cpu/trace/reader/mem_trace_reader.hh:
cpu/trace/trace_cpu.cc:
cpu/trace/trace_cpu.hh:
    updated copyright (only changeset in 2004)
kern/kernel_stats.cc:
kern/kernel_stats.hh:
    updated copyright

--HG--
extra : convert_revision : 726aed4b38ff4d230c63a570df83c63075b3c76f
2004-07-28 17:56:36 -04:00
Erik Hallnor
4869ba881e Remove duplicate stat
cpu/trace/reader/m5_reader.cc:
    Wrap assert variable in NDEBUG

--HG--
extra : convert_revision : 8c79dc30eff2f2fa0110a04c30df17ec4417c28c
2004-07-06 11:29:23 -04:00
Erik Hallnor
018e92e45e Add some rewritten trace readers.
--HG--
extra : convert_revision : 4a085c5d8526d1bf3f7155cda40002281c0c3d1b
2004-06-13 05:52:28 -04:00
Erik Hallnor
e7c7c92184 Tracing now works for upto 4 threads. Easy change to get it to work for more, but I don't have any test handy to test it.
cpu/trace/reader/m5_reader.cc:
    Add thread num.
cpu/trace/trace_cpu.cc:
    Increase thread count to 4, might want to make this a parameter (but it only really costs us storage).

--HG--
extra : convert_revision : 97cd7843668a3ef85aad06e3180dc04d2ca30ac1
2004-06-08 19:52:49 -04:00
Erik Hallnor
5f4297e865 Add the capability to read and write memory trace files. Currently is cycle accurate for a single thread FullCPU.
--HG--
extra : convert_revision : f8fe545313eb307cc6f5ff2c23894cc9870b1d5b
2004-06-08 17:31:04 -04:00