Commit graph

643 commits

Author SHA1 Message Date
Nathan Binkert 31f82cef41 Make the progress event work even after restoring from a checkpoint
--HG--
extra : convert_revision : 80e31eb26250700ebe3ce5848e570068cc76ef47
2004-02-29 18:49:44 -05:00
Nathan Binkert 2272164d66 Fix dumping to work on the opteron. struct timeval can
vary in size, so we're explicit about the fields.

--HG--
extra : convert_revision : e5264849dafb878676b2bfd3a6e6f95f6f94ea48
2004-02-29 17:05:23 -05:00
Erik Hallnor b491bda241 Add support for multiple address ranges in memory interfaces.
dev/alpha_console.cc:
    setAddrRange -> addAddrRange

--HG--
extra : convert_revision : 9dc853b80bea443b54a130ca4c110a68077cb336
2004-02-29 16:18:49 -05:00
Nathan Binkert 27960f6d85 fix rpcc
arch/alpha/ev5.cc:
    actually implement the cycle count register
arch/alpha/isa_desc:
    the rpcc instruction really just reads the cycle count
    register

--HG--
extra : convert_revision : a0edec85672377a62b90950efc17b62b375220b1
2004-02-29 14:54:52 -05:00
Steve Reinhardt c79deda8cd Fix handling of rpcc in full-system mode.
arch/alpha/ev5.cc:
    Handle writing IPR_CC and IPR_CC_CTL slightly more intelligently.
    (Very slightly).
arch/alpha/isa_desc:
    Upper half of rpcc result comes from value written
    to IPR_CC, not actual cycle counter.

--HG--
extra : convert_revision : 7161989db8a3f040d0558e2e5a1a162ed1cb4125
2004-02-28 17:21:32 -05:00
Erik Hallnor cfb6f8fd01 Added copy instructions to the ISA. Well it didn't break anything yet...
arch/alpha/isa_desc:
    Add copy_load and copy_store insts (ldf and stf respectively)
cpu/simple_cpu/simple_cpu.hh:
    Add copy functions to SimpleCPU as well

--HG--
extra : convert_revision : 1fa041da582b418c47d4eefc22dabba978a50e2d
2004-02-27 02:40:43 -05:00
Erik Hallnor c3784e37ce Initial copy support in the pipeline. Add copypal counting.
arch/alpha/osfpal.cc:
    Add a string for copypal.
arch/alpha/osfpal.hh:
    Add a code for copypal.
cpu/static_inst.hh:
    Add an IsCopy flag.

--HG--
extra : convert_revision : 19e3d90368454806029ad492eace19cd0924fe9f
2004-02-27 00:45:21 -05:00
Nathan Binkert 81c1d76d01 fix
--HG--
extra : convert_revision : 67a9e36cda69da6b462e6a30d6daa047ce48fdde
2004-02-26 20:40:00 -05:00
Erik Hallnor 2399fb1196 The DMAInterface was never updated to the new blocking model. Need to hold the request locally until it is retransmitted.
--HG--
extra : convert_revision : cc89d6c4b7f21b7252c172c694633ce1daae30eb
2004-02-26 20:36:29 -05:00
Erik Hallnor 006fb9b421 Quick hack to allow rerequests for the future.
--HG--
extra : convert_revision : 4f1b080ae500dfd022c28e0cd7544c4fcfa5e330
2004-02-26 16:59:04 -05:00
Nathan Binkert 5e8631fd16 stoopid
--HG--
extra : convert_revision : ccd87a2de7f684bb3a4a448a307eb30afd363e12
2004-02-26 14:16:18 -05:00
Steve Reinhardt 40c350fcfe Merge.
--HG--
extra : convert_revision : e83f6895bceb0ced656e90275ec1a93d0af5498d
2004-02-26 07:08:45 -08:00
Steve Reinhardt 6f5e104fc5 Make SW prefetch flag a parameter again, and add code to make
it actually do something on FullCPU.  Still disabled, as it
causes detailed-boot to hang when you turn it on.

arch/alpha/isa_desc:
    Add EAComp and MemAcc pseudo-instructions to prefetch StaticInst.
cpu/simple_cpu/simple_cpu.hh:
    Changed prefetch() return type from Fault to void.

--HG--
extra : convert_revision : c7cb42682bfea6af117c87d4dfdb06176b6fe6b7
2004-02-26 07:05:36 -08:00
Nathan Binkert f8ad539aa5 Save the status of faulting write-hints so that they
won't accidentally be issued to the memory system.

--HG--
extra : convert_revision : 5696a09abcdee54c8bec72d9374f7944fb136740
2004-02-26 01:18:13 -05:00
Erik Hallnor f93e9e063a Make this compile under non full system.
--HG--
extra : convert_revision : 6ae9b4af78cff3c8e5dc367fdbefad496a28857d
2004-02-25 21:32:37 -05:00
Lisa Hsu 752b6cf7c6 delay execContext registration from create() to init() callback in the sampling cpu also.
--HG--
extra : convert_revision : d3947c55f95bb03e73a815188a517043f39925d4
2004-02-25 18:25:20 -05:00
Nathan Binkert a253251ae0 prevent bogus addresses from being sent to the memory system
--HG--
extra : convert_revision : 4f08f8c7ab380436b2ad2c30ba53d9fe305e4496
2004-02-25 16:16:17 -05:00
Nathan Binkert 087a2ed6a1 Merge zizzer.eecs.umich.edu:/bk/m5
into ziff.eecs.umich.edu:/z/binkertn/research/m5/latest

--HG--
extra : convert_revision : 2a258d16ba51ce34f5748825a94b456abfb577cc
2004-02-25 16:13:00 -05:00
Nathan Binkert b678152277 Fix stats debugging and always compile it in for the
debug target

--HG--
extra : convert_revision : aa16e6256a056e6df9affec6fd973e62e812e23c
2004-02-25 16:12:48 -05:00
Lisa Hsu 6a306d4caf add in an init() callback for CPU's so that no stats are accessed prior to the end of the build process. (Done by doing the registerExecContext() calling sequence in the init() process rather than the create() process).
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
    same thing for simple cpu's.

--HG--
extra : convert_revision : aac9f91742866fb26f8cace622f9b88454a69662
2004-02-24 14:59:25 -05:00
Steve Reinhardt f9c91277f3 Quote args properly in tracediff.
util/tracediff:
    Quote simulator args so args with spaces get handled correctly.

--HG--
extra : convert_revision : b48677bc712be17e6e50ca35680e757ba9364692
2004-02-23 08:07:32 -08:00
Nathan Binkert 6d574e9cff Only one request may be on the dma interface at a time,
so add some states to indicate that the dma read/write
hasn't issued yet, and add some support to reissue the
request when the interface becomes unblocked.

--HG--
extra : convert_revision : 448695a8eb2e9f98554769f3165df1f796adf44a
2004-02-23 02:49:09 -05:00
Nathan Binkert cc863129b8 extend the hack by turning the address into a real
physical address

--HG--
extra : convert_revision : 9f752d5ab6def492056d4dfe0bda5eecb022ba80
2004-02-23 02:46:47 -05:00
Nathan Binkert 220952d592 Don't issue memory requests for bogus addresses
--HG--
extra : convert_revision : 786b7fa503436f9a269ebeaedf152c6364874ab5
2004-02-23 02:46:04 -05:00
Nathan Binkert 052e0e3116 Make this like PCI-X
--HG--
extra : convert_revision : 59eaf2c548a88df075b13e78aaa7a4377f20e6c8
2004-02-23 02:44:22 -05:00
Nathan Binkert bc5ed80b32 configurable latency for programmed IO
fix serialization

dev/etherlink.cc:
    fix serialization

--HG--
extra : convert_revision : 6739001f3f97b745d9874bb4c5729cc4909625c2
2004-02-22 18:09:11 -05:00
Nathan Binkert e067bc751b Change order of serialization
sim/sim_object.cc:
    serialize objects in the reverse order of their creation.
    This causes a SimObject that is dependent on another
    to be serialized first.  For example, the ethernet device
    writes back some data to physical memory while serializing,
    so this will cause the physical memory to be serialized
    after that, preserving the data written back.

--HG--
extra : convert_revision : f9a37b63ce777df1cfecefa80f94f8fc69e42448
2004-02-21 10:46:31 -05:00
Nathan Binkert 610081079c New Ethernet device. Descriptors are now done via DMA instead
of faking it.  Renamed stuff to follow our style.  Lots of
general cleanup.

dev/etherpkt.hh:
    fix up includes

--HG--
extra : convert_revision : fb3a21466cdae00f8747d6e3027c9f2c63569c48
2004-02-21 10:43:37 -05:00
Nathan Binkert a1259a4fcf Add a simple event wrapper class that takes a class pointer
and member function and will schedule it for the future.

--HG--
extra : convert_revision : f5c5a8df0839e1e10716850c2086862c4a5bc499
2004-02-20 15:24:21 -05:00
Nathan Binkert ec06c63cc7 make the dma interface useable.
make it so that pio devices must respond with some delay.

dev/io_device.cc:
    don't forget to include dma_interface.hh so we could use it.
dev/io_device.hh:
    the generic BusInterface isn't enough for doing DMA
    we need the actual DMAInterface

--HG--
extra : convert_revision : 70298d33c8520a3f4ad11aa600825a8cec7e44bf
2004-02-20 15:23:27 -05:00
Nathan Binkert 695d51e513 make uncacheable stuff happen again
cpu/simple_cpu/simple_cpu.cc:
    Allow requests to be uncacheable

--HG--
extra : convert_revision : 7ab1442f2eec3763d5bc6a6f37b11f663851b12c
2004-02-20 15:22:41 -05:00
Nathan Binkert 38e8cb8df1 make the devices default to being attached to the memory bus
but provide a #define that can be used to put them on
a separate IO bus

--HG--
extra : convert_revision : 75d48f312c503ad67d22319db691ef5a0de12996
2004-02-20 15:22:02 -05:00
Nathan Binkert aa483a0026 Don't need to specify two etherdump devices
--HG--
extra : convert_revision : 62e8d6b218909c00a97d71e0d3b0f11816499fbf
2004-02-20 15:20:37 -05:00
Nathan Binkert a51cec6669 Make it so dump takes a void *
base/trace.cc:
base/trace.hh:
    take a void * for the raw data

--HG--
extra : convert_revision : fc336dc82b4d533c3a0f319977074f26342445ea
2004-02-20 15:19:55 -05:00
Nathan Binkert ee8c8cbcd8 make etherdump work again
dev/etherdump.cc:
    now that init is automatically called by the framework, don't
    init twice.

--HG--
extra : convert_revision : 16dcdef67aa193ed71ff546e7b255d60f39bf13d
2004-02-20 15:19:19 -05:00
Nathan Binkert 7ad5b6ee22 Merge zizzer.eecs.umich.edu:/bk/m5
into ziff.eecs.umich.edu:/z/binkertn/research/m5/memory

--HG--
extra : convert_revision : 691c89ebacb3c5a5eb67359ed102646b8547dd17
2004-02-20 15:08:02 -05:00
Ron Dreslinski ee799f47d5 Merge zizzer:/bk/m5 into zamp.eecs.umich.edu:/z/rdreslin/m5bk/clean
--HG--
extra : convert_revision : b8e4d9c2901c4c784ecca351fd34a3f5a2845473
2004-02-20 12:45:11 -05:00
Ron Dreslinski 373d70980e Add serialization for packets on the ethernet link,
and for link events

--HG--
extra : convert_revision : 0054dbc4a42dd38ff8bbf64af303bc509dd5aa8a
2004-02-20 12:44:41 -05:00
Lisa Hsu 5e494f0c59 put back $SETUPDIR = $ENV{PWD} for amd purposes.
--HG--
extra : convert_revision : 115a9ea8d08bf3e32ecb689962c8a12c9a7dba26
2004-02-20 12:37:52 -05:00
Nathan Binkert cb928f0391 Merge zizzer.eecs.umich.edu:/bk/m5
into ziff.eecs.umich.edu:/z/binkertn/research/m5/memory

--HG--
extra : convert_revision : 626baf73d2e26201088b05b4e5fac19292abcb32
2004-02-20 11:29:39 -05:00
Lisa Hsu 4ec55bef11 interestingly, when setup is called from a perl script, when you chdir in the perl script, the ENV{PWD} does not change.
--HG--
extra : convert_revision : e1b2fb3e3b791921b9c3f4bb3b7417ff047bbcbf
2004-02-19 17:58:17 -05:00
Andrew Schultz 12747d3084 Change the physical memory logic, and also add misspeculation fix to
tlb index calls that are called from ExecContext::readIpr

arch/alpha/ev5.cc:
    Fix misspeculation bugs for misspeculated IPR accesses

--HG--
extra : convert_revision : c9ffcf9ef8123dfcaee1606c05aee8ad60d893d7
2004-02-18 21:38:55 -05:00
Nathan Binkert 26d0cf70ea Merge zizzer.eecs.umich.edu:/bk/m5
into ziff.eecs.umich.edu:/z/binkertn/research/m5/memory

--HG--
extra : convert_revision : 20e6f7edd432952b3c30d4f017058dfd52456fda
2004-02-18 14:17:44 -05:00
Nathan Binkert 2d5ef88e1c couple fixes
--HG--
extra : convert_revision : bd0948bc831610f442d5ff6893f0e2a68e3aa83f
2004-02-18 14:17:13 -05:00
Nathan Binkert 3bf012fe2f Merge
--HG--
extra : convert_revision : b29c9bbb50994e2567fd58deedb853123d2d69a0
2004-02-18 12:01:04 -05:00
Erik Hallnor 6610699987 Add COW support to the IIC.
cpu/memtest/memtest.cc:
    Move the trace Addr to the end of the printouts

--HG--
extra : convert_revision : 875f0a3f65e07f531a23fea6be07fbf3239ec2c4
2004-02-17 22:53:15 -05:00
Erik Hallnor 4bb902328a Merge ehallnor@zizzer:/bk/m5 into zazzer.eecs.umich.edu:/z/ehallnor/m5
--HG--
extra : convert_revision : 19800f3879c943addbf4bca747b357a94352b6a8
2004-02-17 03:14:21 -05:00
Erik Hallnor 5c77989c9b Change the way data is handled in the cache blocks.
--HG--
extra : convert_revision : 8c071c4f48581a398bebc4f033e18580dca0897f
2004-02-17 03:05:19 -05:00
Andrew Schultz a73e263f94 Change logic for translating a memory addresses, extra checks for invalid
physical addresses.

--HG--
extra : convert_revision : efb4a5229d88cb3c024e0b24f5916048bd42d589
2004-02-16 21:56:38 -05:00
Erik Hallnor b797f99213 Rework BusBridge to have a latency and handle bus IDs correctly.
--HG--
extra : convert_revision : 901ef4782d0c9f0d842deba7acdba7896da7e41c
2004-02-16 16:28:11 -05:00