Merge.
--HG-- extra : convert_revision : e83f6895bceb0ced656e90275ec1a93d0af5498d
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commit
40c350fcfe
2 changed files with 42 additions and 3 deletions
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@ -1000,10 +1000,50 @@ def template PrefetchDeclare {{
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*/
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class %(class_name)s : public %(base_class)s
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{
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protected:
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/**
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* "Fake" effective address computation class for "%(mnemonic)s".
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*/
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class EAComp : public EACompBase
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{
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public:
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/// Constructor
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EAComp(MachInst machInst)
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: EACompBase(machInst)
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{
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%(ea_constructor)s;
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}
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};
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/**
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* "Fake" memory access instruction class for "%(mnemonic)s".
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*/
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class MemAcc : public MemAccBase
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{
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public:
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/// Constructor
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MemAcc(MachInst machInst)
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: MemAccBase(machInst, %(op_class)s)
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{
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%(memacc_constructor)s;
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}
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};
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/// Pointer to EAComp object.
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StaticInstPtr<AlphaISA> eaCompPtr;
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/// Pointer to MemAcc object.
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StaticInstPtr<AlphaISA> memAccPtr;
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public:
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StaticInstPtr<AlphaISA> eaCompInst() { return eaCompPtr; }
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StaticInstPtr<AlphaISA> memAccInst() { return memAccPtr; }
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/// Constructor
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%(class_name)s(MachInst machInst)
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: %(base_class)s("%(mnemonic)s", machInst, %(op_class)s)
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: %(base_class)s("%(mnemonic)s", machInst, %(op_class)s),
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eaCompPtr(new EAComp(machInst)), memAccPtr(new MemAcc(machInst))
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{
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%(constructor)s;
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}
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@ -237,10 +237,9 @@ class SimpleCPU : public BaseCPU
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Fault write(T data, Addr addr, unsigned flags,
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uint64_t *res);
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Fault prefetch(Addr addr, unsigned flags)
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void prefetch(Addr addr, unsigned flags)
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{
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// need to do this...
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return No_Fault;
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}
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void writeHint(Addr addr, int size)
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