creation and initialization now happens in python. Parameter objects
are generated and initialized by python. The .ini file is now solely for
debugging purposes and is not used in construction of the objects in any
way.
--HG--
extra : convert_revision : 7e722873e417cb3d696f2e34c35ff488b7bff4ed
Nag the user during compile if they have an hg cloned copy of M5, have
mercurial installed, but don't have the style hook enabled.
--HG--
extra : convert_revision : 6bcbb67f1a3fcd36db7d3ef16a9ff19680f126f2
src/dev/sparc/iob.cc:
don't warn on cpu restart/idle/halt stuff
tests/SConscript:
add sparc target in test Sconscript
util/regress:
Add SPARC_FS target in regress
--HG--
extra : convert_revision : 37fa21700ec4c350d87ca9723bc3359feb81c50a
src/arch/sparc/isa/decoder.isa:
add readfile and break to sparc decoder
src/arch/sparc/isa/operands.isa:
fix O0-O5 operands registers
util/m5/Makefile.sparc:
Make sparc makefile compile a 64bit binary
util/m5/m5.c:
readfile was in here twice, once will be sufficient I think
util/m5/m5op_sparc.S:
implement readfile and debugbreak
--HG--
extra : convert_revision : 139b3f480ee6342b37b5642e072c8486d91a3944
util/m5/Makefile.alpha:
Clean up to make it a bit easier to muck with
util/m5/Makefile.alpha:
Make the makefile more reasonable
util/m5/Makefile.alpha:
Remove authors from copyright.
util/m5/Makefile.alpha:
Updated Authors from bk prs info
util/m5/Makefile.alpha:
bk cp Makefile Makefile.alpha
src/arch/sparc/tlb.cc:
Clean up the cache code a little bit and make sure the uncacbale bit is set when appropriate
src/arch/alpha/isa/decoder.isa:
src/sim/pseudo_inst.cc:
src/sim/pseudo_inst.hh:
Rename AlphaPseudo -> PseudoInst since it's all generic
src/arch/sparc/isa/bitfields.isa:
src/arch/sparc/isa/decoder.isa:
src/arch/sparc/isa/includes.isa:
src/arch/sparc/isa/operands.isa:
Add support for pseudo instructions in sparc
util/m5/Makefile.alpha:
util/m5/Makefile.sparc:
split off alpha make file and sparc make file for m5 app
util/m5/m5.c:
ivle and ivlb aren't used anymore
util/m5/m5op.h:
stdint seems like a more generic better fit here
util/m5/m5op_alpha.S:
move the op ids into their own header file since we can share them between sparc and alpha
--HG--
rename : util/m5/Makefile => util/m5/Makefile.sparc
rename : util/m5/m5op.S => util/m5/m5op_alpha.S
extra : convert_revision : 490ba2e8b8bc6e28bfc009cedec6b686b28e7834
m5 style and fixing whitespace. For whitespace, any tabs in
leading whitespace on a line are converted to spaces, and any
trailing whitespace is removed.
--HG--
extra : convert_revision : d0591663c028a388635fc71c6c1d31f700748cf6
which takes care of almost everything needed for putting together
a release.
--HG--
extra : convert_revision : b05d418a1002633b1286591eb8a8588ba33f5df1
Write directly to 'cscope.files' and run 'cscope -b' .
Now this script does everything automatically.
cscope-index.py:
Rename: util/cscope-find.py -> util/cscope-index.py
util/cscope-find.py:
Write directly to 'cscope.files' and run 'cscope -b' .
Now this script does everything automatically.
--HG--
rename : util/cscope-find.py => util/cscope-index.py
extra : convert_revision : cd6fa5cc0c2146f7184c9213956aff67c7cb9341
Note that command line syntax has totally changed as a result.
See comments for more details.
--HG--
extra : convert_revision : bdb6e27abd2da83c7468dfe2a95e8bf54757ac6c
util/term/term.c:
Reindent.
util/term/term.c:
Assume localhost if only port number is given on command line.
--HG--
extra : convert_revision : 768e61a56339a0795ca258cca788e9a2c20cbaae
src/cpu/exetrace.cc:
Fixed up to deal with microcode, and to make floating point register numbers correlate to the numbers used in SPARC.
util/statetrace/arch/tracechild_sparc.cc:
util/statetrace/arch/tracechild_sparc.hh:
Make floating point register numbers correlate to the numbers used in SPARC.
--HG--
extra : convert_revision : 878897292f696092453cf61d6eac2d1c407ca13b
util/statetrace/Makefile:
Makefile to build statetrace. Targets are:
statetrace: alias to build using the "native" compiler
statetrace-native: use the native compiler
statetrace-sparc: use the sparc cross compiler
I'll make this a little more fancy and capable later.
util/statetrace/arch/tracechild_i386.cc:
Implementation of i386 support
util/statetrace/arch/tracechild_i386.hh:
Declaration of i386 support
util/statetrace/arch/tracechild_sparc.cc:
implementation of SPARC support
util/statetrace/arch/tracechild_sparc.hh:
declaration of SPARC support
util/statetrace/printer.cc:
Implementation of the "Printer" objects which parse and output the state of the process after each instruction. There are currently two types of printers, nested ones and register ones. These are called NestingPrinter and RegPrinter respectively.
util/statetrace/printer.hh:
Declaration of "Printer" objects
util/statetrace/refcnt.hh:
This is copied from m5. I should use the one already in the tree, but I'll do that later.
util/statetrace/regstate.hh:
Interface for accessing registers.
util/statetrace/statetrace.cc:
Main file with argument parsing and the "main" function which contains the tracing loop.
util/statetrace/tracechild.cc:
Implementation of the base tracechild class.
util/statetrace/tracechild.hh:
Declaration of the base tracechild class.
util/statetrace/tracechild_arch.cc:
This file hooks in support for the appropriate architecture. Just the implementation is brought in, since the main program should ideally not have to know anything at all about an architecture other than it's interface.
util/statetrace/x86.format:
An example output template for x86. A few example SPARC templates will be added later.
--HG--
extra : convert_revision : 7c8bf8230907aba42ed1e707b9ca2d6da0d4e6d4
