Gabe Black
2f1001e95c
X86: Set up a media microop framework and create mov2int and mov2fp microops.
2009-08-17 18:15:18 -07:00
Gabe Black
cec4e3b39e
X86: Create base classes for use with media/SIMD microops.
2009-08-17 18:15:16 -07:00
Gabe Black
0b68fbdbe1
X86: Turn the DIV and IDIV microcode into templates and generate all the variants.
2009-08-17 18:15:14 -07:00
Gabe Black
a9b2bf5119
X86: Remove some FIXMEs from IDIV that have been fixed.
2009-08-17 18:15:13 -07:00
Gabe Black
3f2f3bede8
X86: Turn the CMPXCHG8B microcode into a template and generate each variant.
2009-08-17 18:15:00 -07:00
Gabe Black
32c8514b45
X86: Fix a bug introduced to IDIV in a recent attempt to fix another bug.
2009-08-17 00:20:03 -07:00
Gabe Black
c5fae51774
X86: Implement the CMPXCHG8B/CMPXCHG16B instruction.
2009-08-09 01:01:41 -07:00
Gabe Black
bbf117b20e
X86: Don't clobber the original dividend when doing signed divide.
2009-08-09 01:01:18 -07:00
Gabe Black
3b07a5829d
X86: Decode byte sized singed divide as byte sized.
2009-08-09 01:00:47 -07:00
Gabe Black
6e97feb8a5
X86: Make not taken conditional moves leave the destination alone. Adjust CMOVcc.
...
The manuals from both AMD and Intel say that when writing to a 32 bit
destination in 64 bit mode, the upper 32 bits of the register are filled with
zeros. They also both say that the CMOV instructions leave their destination
alone when their condition fails. Unfortunately, it seems that CMOV will zero
extend its destination register whether or not it was supposed to actually do
a move on both platforms. This seems to be the only case where this happens,
but it would be hard to say for sure.
2009-08-08 17:23:19 -07:00
Gabe Black
7c606e3835
X86: (Re)Implemented SHRD.
2009-08-07 10:13:33 -07:00
Gabe Black
4f5270f946
X86: Implement SHLD.
2009-08-07 10:13:24 -07:00
Gabe Black
3a55fc5cac
X86: Implement shift right/left double microops.
...
This is my best guess as far as what these should do. Other existing microops
use implicit registers, mul1s and mul1u for instance, so this should be ok.
The microop that loads the implicit DoubleBits register would fall into one
of the microop slots for moving to/from special registers.
2009-08-07 10:13:20 -07:00
Gabe Black
62a2e85c9a
X86: Make the qaud width bswap instruction handle the fact that 32 bit operations zero extend.
2009-08-07 10:12:58 -07:00
Gabe Black
0526f453aa
X86: Use the right field when using legacy prefixes to distinguish instructions.
2009-08-07 10:12:52 -07:00
Gabe Black
2daba26359
X86: Don't truncate the immediate parameter for the ENTER instruction.
2009-08-07 10:12:29 -07:00
Gabe Black
2e3446a410
X86: Adjust the various sizes used for the enter and leave instructions.
2009-08-06 21:44:42 -07:00
Gabe Black
c7b894a06f
X86: Make scas compare its operands in the right order.
2009-08-06 21:44:41 -07:00
Gabe Black
011c1865ad
X86: Fix a copy/paste error for cmovnp.
2009-08-06 21:44:40 -07:00
Gabe Black
da2df2fc25
X86: Make conditional moves zero extend their 32 bit destinations always.
2009-08-05 03:07:55 -07:00
Gabe Black
b64d0bdeda
X86: Fix condition code setting for signed multiplies with negative results.
2009-08-05 03:07:01 -07:00
Gabe Black
2914a8eb16
X86: Make the check for negative operands for sign multiply more direct.
2009-08-05 03:06:37 -07:00
Gabe Black
e2e0ae576a
X86: Make sure immediate values are truncated properly.
...
Register values will be "picked" which will assure they don't have junk beyond
the part we're using. Immediate values don't go through a similar process, so
we should truncate them explicitly.
2009-08-05 03:06:01 -07:00
Gabe Black
ef3896d851
X86: Use the new forced folding mechanism for the SAHF and LAHF instructions.
2009-08-05 03:04:17 -07:00
Gabe Black
664d50b439
X86: Fix the indexing for ah in byte division instructions.
2009-08-05 03:03:41 -07:00
Gabe Black
abe8fb3844
X86: Fix the indexing for ah in byte multiply instructions.
2009-08-05 03:03:28 -07:00
Gabe Black
df1abc4412
X86: Let microops force folding an index into the high byte of a register.
2009-08-05 03:03:07 -07:00
Gabe Black
c4140d7d60
X86: Handle rotate left with carry instructions that go all the way around or more.
2009-08-05 03:02:28 -07:00
Gabe Black
3990445354
X86: Set the flags on rotate left with carry instructions.
2009-08-05 03:02:05 -07:00
Gabe Black
d265f7683e
X86: Handle rotate right with carry instructions that go all the way around or more.
2009-08-05 03:01:49 -07:00
Gabe Black
77dc6b33ee
X86: Fix the overflow bit for rotate right with carry.
2009-08-05 03:01:23 -07:00
Gabe Black
c8b1a4583e
X86: Fix the computation of the bottom part of rotate right with carry.
2009-08-05 03:01:07 -07:00
Gabe Black
bab4597fc5
X86: Fix the computation of the upper part of rotate right with carry.
2009-08-05 03:00:43 -07:00
Gabe Black
4e4adcaaa8
X86: Set the flags for rotate right with carry instructions.
2009-08-05 03:00:23 -07:00
Gabe Black
64d7948692
X86: Handle rotating right all the way around or more.
2009-08-05 03:00:03 -07:00
Gabe Black
88041f75c4
X86: Set the flags on a rotate right instruction.
2009-08-05 02:59:39 -07:00
Gabe Black
029d360db2
X86: Make shifts/rotations that write to 32 bits of a register zero extend.
2009-08-05 02:59:25 -07:00
Gabe Black
7f9a3af250
X86: Handle left rotations that go all the way around or more.
2009-08-05 02:58:54 -07:00
Gabe Black
99adfd9dae
X86: Actually set the flags on a rotate left instruction.
2009-08-05 02:58:20 -07:00
Gabe Black
c087b60af3
X86: Fix the sar carry flag.
2009-08-05 02:58:03 -07:00
Gabe Black
860f0f8350
X86: Fix sign extension when doing an arithmetic shift right by 0.
2009-08-05 02:57:47 -07:00
Gabe Black
a238959c34
X86: Fix the carry flag for shr.
2009-08-05 02:56:49 -07:00
Gabe Black
22a5f66820
X86: Fix the carry flag for shl.
2009-08-05 02:56:38 -07:00
Gabe Black
df2c862a07
X86: Fix how the parity flag is computed.
...
It's only for the lowest order byte, and I had the polarity wrong.
2009-08-05 02:56:12 -07:00
Gabe Black
676dc6d292
X86: Fix segment override prefixes on instructions that use rbp/rsp and a displacement.
2009-08-03 11:01:40 -07:00
Gabe Black
aff57202b4
X86: Fix the high result of mul1s, and removed undefined shifts from the mult microops.
2009-08-02 08:39:29 -07:00
Steve Reinhardt
1c28004654
Clean up some inconsistencies with Request flags.
2009-08-01 22:50:13 -07:00
Gabe Black
3e8e813218
CPU: Separate out native trace into ISA (in)dependent code and SimObjects.
...
--HG--
rename : src/cpu/nativetrace.cc => src/arch/sparc/nativetrace.cc
rename : src/cpu/nativetrace.hh => src/arch/sparc/nativetrace.hh
rename : src/cpu/NativeTrace.py => src/arch/x86/X86NativeTrace.py
2009-07-19 23:54:56 -07:00
Gabe Black
f0cb698a87
X86: Move a displaced comment back to where it goes.
2009-07-19 23:51:47 -07:00
Gabe Black
563654275f
X86: Add some misc registers for FP control state.
2009-07-19 23:51:41 -07:00
