code.
base/statistics.hh:
We're getting rid of FS_MEASURE, but for now, we're going
to still use a compile time flag to turn on and off binning
of statistics. (The flag is STATS_BINNING)
cpu/exec_context.cc:
cpu/exec_context.hh:
kern/tru64/tru64_system.cc:
get rid of FS_MEASURE
cpu/simple_cpu/simple_cpu.cc:
yank the function call tracking code out of the cpu and move
it into the software context class itself.
kern/tru64/tru64_system.hh:
get rid of FS_MEASURE
move all of the tacking stuff to the same place.
sim/system.hh:
cleanup
--HG--
extra : convert_revision : 73d3843afe1b3ba0d5445421c39c1148d3f4e7c0
arch/alpha/ev5.cc:
actually implement the cycle count register
arch/alpha/isa_desc:
the rpcc instruction really just reads the cycle count
register
--HG--
extra : convert_revision : a0edec85672377a62b90950efc17b62b375220b1
arch/alpha/ev5.cc:
Handle writing IPR_CC and IPR_CC_CTL slightly more intelligently.
(Very slightly).
arch/alpha/isa_desc:
Upper half of rpcc result comes from value written
to IPR_CC, not actual cycle counter.
--HG--
extra : convert_revision : 7161989db8a3f040d0558e2e5a1a162ed1cb4125
arch/alpha/isa_desc:
Add copy_load and copy_store insts (ldf and stf respectively)
cpu/simple_cpu/simple_cpu.hh:
Add copy functions to SimpleCPU as well
--HG--
extra : convert_revision : 1fa041da582b418c47d4eefc22dabba978a50e2d
arch/alpha/osfpal.cc:
Add a string for copypal.
arch/alpha/osfpal.hh:
Add a code for copypal.
cpu/static_inst.hh:
Add an IsCopy flag.
--HG--
extra : convert_revision : 19e3d90368454806029ad492eace19cd0924fe9f
it actually do something on FullCPU. Still disabled, as it
causes detailed-boot to hang when you turn it on.
arch/alpha/isa_desc:
Add EAComp and MemAcc pseudo-instructions to prefetch StaticInst.
cpu/simple_cpu/simple_cpu.hh:
Changed prefetch() return type from Fault to void.
--HG--
extra : convert_revision : c7cb42682bfea6af117c87d4dfdb06176b6fe6b7
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
same thing for simple cpu's.
--HG--
extra : convert_revision : aac9f91742866fb26f8cace622f9b88454a69662
util/tracediff:
Quote simulator args so args with spaces get handled correctly.
--HG--
extra : convert_revision : b48677bc712be17e6e50ca35680e757ba9364692
so add some states to indicate that the dma read/write
hasn't issued yet, and add some support to reissue the
request when the interface becomes unblocked.
--HG--
extra : convert_revision : 448695a8eb2e9f98554769f3165df1f796adf44a
sim/sim_object.cc:
serialize objects in the reverse order of their creation.
This causes a SimObject that is dependent on another
to be serialized first. For example, the ethernet device
writes back some data to physical memory while serializing,
so this will cause the physical memory to be serialized
after that, preserving the data written back.
--HG--
extra : convert_revision : f9a37b63ce777df1cfecefa80f94f8fc69e42448
of faking it. Renamed stuff to follow our style. Lots of
general cleanup.
dev/etherpkt.hh:
fix up includes
--HG--
extra : convert_revision : fb3a21466cdae00f8747d6e3027c9f2c63569c48
make it so that pio devices must respond with some delay.
dev/io_device.cc:
don't forget to include dma_interface.hh so we could use it.
dev/io_device.hh:
the generic BusInterface isn't enough for doing DMA
we need the actual DMAInterface
--HG--
extra : convert_revision : 70298d33c8520a3f4ad11aa600825a8cec7e44bf
dev/etherdump.cc:
now that init is automatically called by the framework, don't
init twice.
--HG--
extra : convert_revision : 16dcdef67aa193ed71ff546e7b255d60f39bf13d
tlb index calls that are called from ExecContext::readIpr
arch/alpha/ev5.cc:
Fix misspeculation bugs for misspeculated IPR accesses
--HG--
extra : convert_revision : c9ffcf9ef8123dfcaee1606c05aee8ad60d893d7