Commit graph

11547 commits

Author SHA1 Message Date
Nilay Vaish
6bee1d9124 ruby: topology: refactor code. 2015-09-14 10:14:50 -05:00
Nilay Vaish
4e898be762 ruby: slicc: remove member buffer_expr from Var class
This was added by changeset 51f40b101a56.  Instead, buffer_expr would now be
associated with the InPort class.
2015-09-14 10:04:55 -05:00
Nilay Vaish
78bf2dfeac merged with 62e1504b9c64 2015-09-12 16:23:47 -05:00
Nilay Vaish
8b199b775e ruby: perfect switch: refactor code
Refactored the code in operateVnet(), moved partly to a new function
operateMessageBuffer().  This is required since a later patch moves to having a
wakeup event per MessageBuffer instead of one event for the entire Switch.
2015-09-12 16:16:17 -05:00
Nilay Vaish
25cd13dbf1 ruby: simple network: store Switch* in PerfectSwitch and Throttle
There are two reasons for doing so:

a. provide a source of clock to PerfectSwitch. A follow on patch removes sender
and receiver pointers from MessageBuffer means that the object owning the
buffer should have some way of providing timing info.

b. schedule events.  A follow on patch removes the consumer class.  So the
PerfectSwitch needs some EventManager object to schedule events on its own.
2015-09-12 16:16:03 -05:00
Andreas Sandberg
a151786741 dev: Add an underrun statistic to the HDLCD controller
Add a stat that counts buffer underruns in the HDLCD controller. The
stat counts at most one underrun per frame since the controller aborts
the current frame if it underruns.
2015-09-11 15:56:09 +01:00
Andreas Sandberg
f7055e9215 dev, arm: Rewrite the HDLCD controller
Rewrite the HDLCD controller to use the new DMA engine and pixel
pump. This fixes several bugs in the current implementation:

   * Broken/missing interrupt support (VSync, underrun, DMA end)
   * Fragile resolution changes (changing resolutions used
     to cause assertion errors).
   * Support for resolutions with a width that isn't divisible by 32.
   * The pixel clock can now be set dynamically.

This breaks checkpoint compatibility. Checkpoints can be upgraded with
the checkpoint conversion script. However, upgraded checkpoints won't
contain the state of the current frame. That means that HDLCD
controllers restoring from a converted checkpoint immediately start
drawing a new frame (i.e, expect timing differences).
2015-09-11 15:55:46 +01:00
Nilay Vaish
f611d4f22e ruby: slicc: remove nextLineHack from Type.py 2015-09-08 19:32:04 -05:00
Nilay Vaish
bc5be9ac43 config: allow ruby to be used with Minor CPU 2015-09-06 23:11:11 -05:00
Nilay Vaish
740984b30b ruby: call setMRU from L1 controllers, not from sequencer
Currently the sequencer calls the function setMRU that updates the replacement
policy structures with the first level caches.  While functionally this is
correct, the problem is that this requires calling findTagInSet() which is an
expensive function.  This patch removes the calls to setMRU from the sequencer.
All controllers should now update the replacement policy on their own.

The set and the way index for a given cache entry can be found within the
AbstractCacheEntry structure. Use these indicies to update the replacement
policy structures.
2015-09-05 09:35:39 -05:00
Nilay Vaish
8f29298bc7 ruby: adds set and way indices to AbstractCacheEntry 2015-09-05 09:35:31 -05:00
Nilay Vaish
abcc67010e ruby: set: reimplement using std::bitset
The current Set data structure is slow and therefore is being reimplemented
using std::bitset. A maximum limit of 64 is being set on the number of
controllers of each type.  This means that for simulating a system with more
controllers of a given type, one would need to change the value of the variable
NUMBER_BITS_PER_SET
2015-09-05 09:34:25 -05:00
Nilay Vaish
7962a81148 ruby: declare all protocol message buffers as parameters
MessageBuffer is a SimObject now.  There were protocols that still declared
some of the message buffers are variables of the controller, but not as input
parameters.  Special handling was required for these variables in the SLICC
compiler.  This patch changes this.  Now all message buffers are declared as
input parameters.
2015-09-05 09:34:24 -05:00
Andreas Hansson
419d437385 mem: Avoid setting markPending if not needed
In cases where a newly added target does not have any upstream MSHR to
mark as downstreamPending, remember that nothing is marked. This
allows us to avoid attempting to find the MSHR as part of the clearing
of downstreamPending.
2015-09-04 13:14:03 -04:00
Andreas Hansson
2c50a83ba2 mem: Tidy up CacheSet
Minor tweaks and house keeping.
2015-09-04 13:14:01 -04:00
Andreas Hansson
76088fb9ca mem: Tidy up the snoop state-transition logic
Remove broken and unused option to pass dirty data on non-exclusive
snoops. Also beef up the comments a bit.
2015-09-04 13:13:58 -04:00
Andreas Hansson
8e74d5484f sim: Fix time unit in abort message 2015-09-04 13:13:55 -04:00
Nilay Vaish
80b911afd5 merged with recent commits. 2015-09-03 15:40:20 -05:00
Nilay Vaish
2ab38ba13c Added tag stable_2015_09_03 for changeset 60eb3fef9c2d 2015-09-03 15:38:46 -05:00
Curtis Dunham
87b9da2df4 sim: tag-based checkpoint versioning
This commit addresses gem5 checkpoints' linear versioning bottleneck.
Since development is distributed across many private trees, there exists
a sort of 'race' for checkpoint version numbers: internally a checkpoint
version may be used but then resynchronizing with the external tree causes
a conflict on that version.  This change replaces the linear version number
with a set of unique strings called tags.  Now the only conflicts that can
arise are of tag names, where collisions are much easier to avoid.

The checkpoint upgrader (util/cpt_upgrader.py) upgrades the version
representation, as one would expect. Each tag version implements its
upgrader code in a python file in the util/cpt_upgraders directory
rather than adding a function to the upgrader script itself.

The version tags are stored in the 'Globals' section rather than 'root'
(as the version was previously) because 'Globals' gets unserialized
first and can provide a warning before any other unserialization errors
can occur.
2015-09-02 15:23:30 -05:00
Curtis Dunham
62e0344aef sim: support checkpointing std::set<std::string>'s
This is in support of tag-based checkpoint versioning; the version tags
are stored in string sets. This commit adds such support.
2015-09-02 15:19:44 -05:00
Curtis Dunham
1ad5b77229 sim: make warning for absent optional parameters optional
This is in support of tag-based checkpoint versioning. It should be
possible to examine an optional parameter in a checkpoint during
unserialization and not have it throw a warning.
2015-09-02 15:19:43 -05:00
Nilay Vaish
fe47f0a72f ruby: remove random seed
We no longer use the C library based random number generator: random().
Instead we use the C++ library provided rng.  So setting the random seed for
the RubySystem class has no effect.  Hence the variable and the corresponding
option are being dropped.
2015-09-01 15:50:33 -05:00
Nilay Vaish
5d555df359 ruby: directory memory: drop unused variable. 2015-09-01 15:50:32 -05:00
Andreas Sandberg
05852e698a sim: Remove broken AutoSerialize support from the event queue
Event auto-serialization no longer in use and has been broken ever
since the introduction of PDES support almost two years
ago. Additionally, serializing the individual event queues is
undesirable since it exposes the thread structure of the
simulator. What this means in practice is that the number of threads
in the simulator must be the same when taking a checkpoint and when
loading the checkpoint.

This changeset removes support for the AutoSerialize event flag and
the associated serialization code.
2015-09-01 15:28:45 +01:00
Andreas Sandberg
53001e6e09 dev: Remove auto-serialization dependency in EtherLink
EtherLink currently uses a fire-and-forget link delay event that
delays sending of packets by a fixed number of ticks. In order to
serialize this event, it relies on the event queue's auto
serialization support. However, support for event auto serialization
has been broken for more than two years, which means that checkpoints
of multi-system setups are likely to drop in-flight packets.

This changeset the replaces rewrites this part of the EtherLink to use
a packet queue instead. The queue contains a (tick, packet) tuple. The
tick indicates when the packet will be ready. Instead of relying on
event autoserialization, we now explicitly serialize the packet queue
in the EhterLink::Link class.

Note that this changeset changes the way in-flight packages are
serialized. Old checkpoints will still load, but in-flight packets
will be dropped (just as before). There has been no attempt to upgrade
checkpoints since this would actually change the behavior of existing
checkpoints.
2015-09-01 15:28:44 +01:00
Andreas Sandberg
0572dc3c6e sim: Remove autoserialize support for exit events
This changeset removes the support for the autoserialize parameter in
GlobalSimLoopExitEvent (including exitSimLoop()) and
LocalSimLoopExitEvent.

Auto-serialization of the LocalSimLoopExitEvent was never used, so
this is not expected to affect anything. However, it was sometimes
used for GlobalSimLoopExitEvent. Unfortunately, serialization of
global events has never been supported, so checkpoints with such
events will currently cause simulation panics.

The serialize parameter to exitSimLoop() has been left in-place to
maintain API compatibility (removing it would affect m5ops). Instead
of just dropping it, we now print a warning if the parameter is set
and the exit event is scheduled in the future (i.e., not at the
current tick).
2015-09-01 13:41:45 +01:00
Andreas Sandberg
1fa7a4394c sim: Remove unused SerializeBuilder interface 2015-09-01 13:40:28 +01:00
Andreas Sandberg
4411c97ee1 sim: Replace fromInt/fromSimObject with decltype 2015-09-01 13:40:25 +01:00
Andreas Sandberg
db465fd788 sim: Move SimObject resolver to sim_object.hh
The object resolver isn't serialization specific and shouldn't live in
serialize.hh. Move it to sim_object.hh since it queries to the
SimObject hierarchy.
2015-09-01 13:40:05 +01:00
Nilay Vaish
66941163e5 stats: updates due to recent changes. 2015-08-30 12:24:19 -05:00
Nilay Vaish
a60a93eb05 ruby: specify number of vnets for each protocol
The default value for number of virtual networks is being removed.  Each protocol
should now specify the value it needs.
2015-08-30 12:24:18 -05:00
Nilay Vaish
bf8ae288fa ruby: network: drop member m_in_use
This member indicates whether or not a particular virtual network is in use.
Instead of having a default big value for the number of virtual networks and
then checking whether a virtual network is in use, the next patch removes the
default value and the protocol configuration file would now specify the
number of virtual networks it requires.

Additionally, the patch also refactors some of the code used for computing the
virtual channel next in the round robin order.
2015-08-30 12:24:18 -05:00
Nilay Vaish
7175db4a3f ruby: garnet: mark few functions const in BaseGarnetNetwork.hh 2015-08-30 12:24:18 -05:00
Nilay Vaish
426e38af8b ruby: slicc: avoid duplicate code for function argument check
Both FuncCallExprAST and MethodCallExprAST had code for checking the arguments
with which a function is being called.  The patch does away with this
duplication.  Now the code for checking function call arguments resides in the
Func class.
2015-08-30 10:52:58 -05:00
Nilay Vaish
4727fc26f8 ruby: eliminate type uint64 and int64
These types are being replaced with uint64_t and int64_t.
2015-08-29 10:19:23 -05:00
Andreas Sandberg
e9d6bf5e35 ruby: Use the const serialize interface in RubySystem
The new serialization code (kudos to Tim Jones) moves all of the state
mangling in RubySystem to memWriteback. This makes it possible to use
the new const serialization interface.

This changeset moves the cache recorder cleanup from the checkpoint()
method to drainResume() to make checkpointing truly constant and
updates the checkpointing code to use the new interface.
2015-08-28 10:58:44 +01:00
Nilay Vaish
fc3d34a488 ruby: handle llsc accesses through CacheEntry, not CacheMemory
The sequencer takes care of llsc accesses by calling upon functions
from the CacheMemory.  This is unnecessary once the required CacheEntry object
is available.  Thus some of the calls to findTagInSet() are avoided.
2015-08-27 12:51:40 -05:00
Emilio Castillo
88b1fd82a6 cpu: quiesce pseudoinsts: Always do full quiesce
The O3CPU blocks the Fetch when it sees a quiesce instruction (IsQuiesce flag).
When the inst. is executed, a quiesce event is created to reactivate the
context and unblock the Fetch.

If the quiesceNs or quiesceCycles are called with a value of 0, the
QuiesceEvent will not be created and the Fetch stage will remain blocked.


Committed by Joel Hestness <jthestness@gmail.com>
2015-08-26 14:20:30 -05:00
Andreas Hansson
ce4f6a9020 mem: Revert requirement on packet addr/size always valid
This patch reverts part of (842f56345a42), as apparently there are
use-cases outside the main repository relying on the late setting of
the physical address.
2015-08-24 05:03:45 -04:00
Andreas Hansson
daaae3744d mem: Reflect that packet address and size are always valid
This patch simplifies the packet, and removes the possibility of
creating a packet without a valid address and/or size. Under no
circumstances are these fields set at a later point, and thus they
really have to be provided at construction time.

The patch also fixes a case there the MinorCPU creates a packet
without a valid address and size, only to later delete it.
2015-08-21 07:03:27 -04:00
Andreas Hansson
6eb434c8a2 arm, mem: Remove unused CLEAR_LL request flag
Cleaning up dead code. The CLREX stores zero directly to
MISCREG_LOCKFLAG and so the request flag is no longer needed. The
corresponding functionality in the cache tags is also removed.
2015-08-21 07:03:25 -04:00
Andreas Hansson
bda79817c8 mem: Remove unused cache squash functionality
Tidying up.
2015-08-21 07:03:24 -04:00
Andreas Hansson
ddfa96cf45 mem: Add explicit Cache subclass and make BaseCache abstract
Open up for other subclasses to BaseCache and transition to using the
explicit Cache subclass.

--HG--
rename : src/mem/cache/BaseCache.py => src/mem/cache/Cache.py
2015-08-21 07:03:23 -04:00
Andreas Hansson
d71a0d790d ruby: Move Rubys cache class from Cache.py to RubyCache.py
This patch serves to avoid name clashes with the classic cache. For
some reason having two 'SimObject' files with the same name creates
problems.

--HG--
rename : src/mem/ruby/structures/Cache.py => src/mem/ruby/structures/RubyCache.py
2015-08-21 07:03:21 -04:00
Andreas Hansson
1bf389a2bf mem: Move cache_impl.hh to cache.cc
There is no longer any need to keep the implementation in a header.
2015-08-21 07:03:20 -04:00
Andreas Hansson
ae06e9a5c6 cpu: Move invldPid constant from Request to BaseCPU
A more natural home for this constant.
2015-08-21 07:03:14 -04:00
Nilay Vaish
2f44dada68 ruby: reverts to changeset: bf82f1f7b040 2015-08-19 10:02:01 -05:00
Nilay Vaish
2d9f3f8582 ruby: add accessor functions to SLICC def of MachineID 2015-08-14 19:28:44 -05:00
Nilay Vaish
62dcbe3d95 ruby: simple network: refactor code
Drops an unused variable and marks three variables as const.
2015-08-14 19:28:44 -05:00