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Author SHA1 Message Date
Gabe Black
0ce6936e7d Zero out ModRM if the byte isn't there, and fix some displacement size stuff. 
--HG--
extra : convert_revision : f43abf33a223a665b30098c63011fb162200d5e6
 2007-04-03 14:56:24 +00:00
Gabe Black
7fcc9d2106 Made the MultiOp format do a little more. It now sets up single microop instructions to return an instance of the right class. The code to decode register numbers and generate loads and stores still needs to be added. Also, a syntax for specifying operands as sources, destinations, or both needs to be established. Multipl microop instructions are also not handled, pending real macroop generation support. 
--HG--
extra : convert_revision : 1a0a4b36afce8255e23e3cdd7a85c1392dda5f72
 2007-03-29 17:57:19 +00:00
Gabe Black
e67a207ad3 Add a microcode assembler. A microcode "program" is a series of statements. Each statement has an optional label at the beginning, a capitilized microcode class name which is roughly equivalent to a mnemonic in a regular ISA, and then an optional series of operands seperated by white space. The operands are either a decimal constant, a label, or a code fragment surrounded by non nested {}s. Labels are a letter or underscore followed by letters, underscores, or digits. The syntax for describing code segments might need to be changed if a need arrises to have {}s in the code itself. 
--HG--
extra : convert_revision : 8e5cfdd1a3c9a7e3731fdf6acd615ee82ac2b9b7
 2007-03-29 17:57:18 +00:00
Gabe Black
77ce05f478 Fidget with the syntax of the MultiOp format in anticipation of making it actually work. 
--HG--
extra : convert_revision : f62a1f035cc11677df8eb5a839ca1247d819fab3
 2007-03-29 00:50:54 -07:00
Gabe Black
fd77212b72 Add code to generate register and immediate based integer op microop classes. 
--HG--
extra : convert_revision : 718f941da74dd3b4557cd21e1772879ac21aa9c6
 2007-03-29 00:49:53 -07:00
Gabe Black
0d5f6167ff Allow "let" blocks to add code to the output files. 
--HG--
extra : convert_revision : 0ffddb2b40dccbf2a3790464c843cfc1b43eaa02
 2007-03-29 00:47:46 -07:00
Kevin Lim
4bad33ce9d Merge ktlim@zizzer:/bk/newmem 
into  zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/clean2

--HG--
extra : convert_revision : f3d193dd1e0b82c496d8224f014123b7cb028c02
 2007-03-24 14:00:16 -04:00
Gabe Black
e7bbd85ae6 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : 6b1c8025d29f3e8f90906805dd51a5d523d56004
 2007-03-23 21:47:03 -04:00
Kevin Lim
047f77102b Merge ktlim@zizzer:/bk/newmem 
into  zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/clean2

src/cpu/base_dyn_inst.hh:
    Hand merge.  Line is no longer needed because it's handled in the ISA.

--HG--
extra : convert_revision : 0be4067aa38759a5631c6940f0167d48fde2b680
 2007-03-23 13:20:19 -04:00
Kevin Lim
2330adfa28 Make hardware loads/stores serializing; they need to avoid certain out-of-order interactions in the 21264. 
--HG--
extra : convert_revision : d83940af7d0e8efe891d574ac42c6d70d179e2b1
 2007-03-23 13:14:05 -04:00
Gabe Black
e3d3ab4513 Add structure based bitfield syntax to the isa_parser. This is primarily useful for x86. 
--HG--
extra : convert_revision : dfe6df160d00adec1830d9b88520ba20834d1209
 2007-03-22 04:10:57 +00:00
Gabe Black
39182808bc Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 79c337f18d635acc176f0ca8d6e71fbc429cb258
 2007-03-22 04:10:56 +00:00
Gabe Black
276f6d794d Add a junk operand. With no operands, the parser breaks. 
--HG--
extra : convert_revision : 7410fd3681ed3d9b1293d982ed5f3553a6c75f3f
 2007-03-21 21:09:24 +00:00
Gabe Black
bbffaa8ee0 Start implementing groups of instructions which do the same thing on different sets of inputs. 
--HG--
extra : convert_revision : 6a5be61831588f801965dd4e80cb52f28911c320
 2007-03-21 21:07:43 +00:00
Gabe Black
1707aa750f put the int register count in intregs.hh 
--HG--
extra : convert_revision : c48c13d9c4606c8cb7c60d18cd0f4dac9103a501
 2007-03-21 21:04:54 +00:00
Gabe Black
0a80d06dea Break out the one and two byte opcodes into different files. Also change what bits decode is done on to reflect where clumps of instructions are. 
--HG--
extra : convert_revision : 8768676eac25e6a4f0dc50ce2dc576bdcdd6e025
 2007-03-21 19:19:53 +00:00
Gabe Black
3efec59fc5 Missed a const 
--HG--
rename : src/arch/x86/isa/decoder.isa => src/arch/x86/isa/decoder/decoder.isa
extra : convert_revision : a60e7495da6fe99fa2375a3f801f2962c3e41adb
 2007-03-21 19:15:40 +00:00
Gabe Black
63e2d3dcbf Merge zizzer.eecs.umich.edu:/bk/newmem 
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace

--HG--
extra : convert_revision : 41214c71e7fa11d47395975a141793337d020463
 2007-03-21 01:18:55 -04:00
Gabe Black
475d36ee93 Ignore "time" and "times" syscalls. 
--HG--
extra : convert_revision : 3ff55e35877c0fd74823ce5e52ed16c38da92068
 2007-03-20 23:53:52 -04:00
Gabe Black
e7b015cee1 Added syntax for structure oriented extMachInsts. 
--HG--
extra : convert_revision : 4a30c58019ad8e3dd8dffb4c4c08eb6914e5c5be
 2007-03-20 06:08:52 +00:00
Gabe Black
7c0825ccf9 Compile fixes for SPARC_FS. 
src/arch/alpha/predecoder.hh:
src/arch/sparc/predecoder.hh:
    Put in a missing include
src/cpu/exetrace.cc:
    Convert the legion lockstep stuff from makeExtMI to the predecoder object.

--HG--
extra : convert_revision : 91bad4466f8db1447fff8608fa46a5f236dc3a89
 2007-03-18 23:09:51 -04:00
Gabe Black
a1f92af0fb The syntax used for twin stores was confusing the parser so it's now broken down farther. 
--HG--
extra : convert_revision : d36bef2d15bc013b3c6199901f57855dfb9dab76
 2007-03-17 21:23:03 -04:00
Gabe Black
3ccaee976a Make the SPARC branch instructions use ExtMachInsts in their constructors. This isn't necessary since they don't use the extended fields, but it's more consistent and more correct. 
--HG--
extra : convert_revision : afd4f408122ad5e497012eb9744d6bce66a1de37
 2007-03-16 10:55:50 +00:00
Gabe Black
9ad3f1e479 Refactor things a little. 
--HG--
extra : convert_revision : 8167455ffc05130d4afcc68466879c7c439bee57
 2007-03-15 19:16:39 +00:00
Gabe Black
f4eee4fb81 File with the predecoder in it. 
src/arch/x86/predecoder.cc:
    File for the x86 predecoder process function.

--HG--
extra : convert_revision : f7b53c38ff152cb2677d641074218ffd8434457b
 2007-03-15 19:16:38 +00:00
Gabe Black
ae9bed4f8f Split the x86 "process" predecoder method into it's own file. 
--HG--
extra : convert_revision : 88185e592df2a7527d36efcce7376fb05f469cbc
 2007-03-15 19:16:37 +00:00
Gabe Black
6cdd434f7f Changed warns to DPRINTFs and multiply by 8 where needed. 
--HG--
extra : convert_revision : 9db0bc2420ceb5828a79881fa0b420a2d5e5f358
 2007-03-15 16:13:40 +00:00
Gabe Black
075df1469f Added immediate value support, and fixed alot of bugs. This won't support 3 byte opcodes. 
--HG--
extra : convert_revision : 4c79bff2592a668e1154916875f019ecafe67022
 2007-03-15 15:29:39 +00:00
Gabe Black
4379e54b52 Compile fix 
--HG--
extra : convert_revision : 4a66d04404beee9656e3e33089afcec10d7ee5ff
 2007-03-15 03:17:00 +00:00
Gabe Black
32368a2bd6 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

src/arch/mips/utility.hh:
src/arch/x86/SConscript:
    Hand merge

--HG--
extra : convert_revision : 0ba457aab52bf6ffc9191fd1fe1006ca7704b5b0
 2007-03-15 02:52:51 +00:00
Gabe Black
a2b56088fb Make the predecoder an object with it's own switched header file. Start adding predecoding functionality to x86. 
src/arch/SConscript:
src/arch/alpha/utility.hh:
src/arch/mips/utility.hh:
src/arch/sparc/utility.hh:
src/cpu/base.hh:
src/cpu/o3/fetch.hh:
src/cpu/o3/fetch_impl.hh:
src/cpu/simple/atomic.cc:
src/cpu/simple/base.cc:
src/cpu/simple/base.hh:
src/cpu/static_inst.hh:
src/arch/alpha/predecoder.hh:
src/arch/mips/predecoder.hh:
src/arch/sparc/predecoder.hh:
    Make the predecoder an object with it's own switched header file.

--HG--
extra : convert_revision : 77206e29089130e86b97164c30022a062699ba86
 2007-03-15 02:47:42 +00:00
Gabe Black
ff90b8c1aa Merge zizzer.eecs.umich.edu:/bk/newmem 
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace

--HG--
extra : convert_revision : 61eca737296a5ce839d3b97f047b4fda062cb899
 2007-03-13 15:03:34 -04:00
Gabe Black
ce18d900a1 Replaced makeExtMI with predecode. 
Removed the getOpcode function from StaticInst which only made sense for Alpha.
Started implementing the x86 predecoder.

--HG--
extra : convert_revision : a13ea257c8943ef25e9bc573024a99abacf4a70d
 2007-03-13 16:13:21 +00:00
Ali Saidi
a068d6db0f fix interrupting during a quisce on sparc 
src/arch/sparc/ua2005.cc:
    fix interrupting when quisced. Since sticks correspond to instructions when not quisced we need to
    check if were suspended and interrupt at the guess time
src/base/traceflags.py:
    add trace flag for Iob
src/cpu/simple/base.cc:
    Use Quisce instead of IPI trace flag
src/dev/sparc/iob.cc:
    add some Dprintfs

--HG--
extra : convert_revision : 72e18fcc750ad1e4b2bb67b19b354eaffc6af6d5
 2007-03-13 00:05:52 -04:00
Gabe Black
1f3c3aa234 Fix mulscc. 
--HG--
extra : convert_revision : 405f10f14f2f6666a7bef01bfb0cf90ff14cef24
 2007-03-12 17:07:10 -04:00
Ali Saidi
1356fb953d Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : c6fbe09348b606b94bbb35f911dea94353f076f9
 2007-03-12 13:56:30 -04:00
Ali Saidi
9ad24e2248 move hver code to ua2005.cc 
src/arch/sparc/miscregfile.cc:
    this code should be in readFSreg
src/arch/sparc/ua2005.cc:
    move code froh miscregfile to ua2005.cc

--HG--
extra : convert_revision : fa450b04ad73ab6f6e25d66fa0368054263f09f9
 2007-03-12 13:56:09 -04:00
Gabe Black
b3bdce81fd Add the rename syscall. 
--HG--
extra : convert_revision : 67e92b166599bd20b7ce90d073f2fd7502f810ec
 2007-03-12 01:54:15 -04:00
Gabe Black
57650a201e Fix the mnemonic and the branch displacement field size of the branch on floating point condition codes with prediction. 
--HG--
extra : convert_revision : 812950e92b7e0f34f370a1472c20f52e3ef214b1
 2007-03-12 01:47:49 -04:00
Gabe Black
6a7e4a5904 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace

--HG--
extra : convert_revision : 725999a0a5bde6e065bad87b42e973c5c627c69f
 2007-03-11 18:19:38 -04:00
Gabe Black
26c0426e44 Make sttw and sttwa use the twin memory operations. 
--HG--
extra : convert_revision : 368d1c57a46fd5ca15461cb5ee8e05fd1e080daa
 2007-03-11 18:12:33 -04:00
Nathan Binkert
1aef5c06a3 Rework the way SCons recurses into subdirectories, making it 
automatic.  The point is that now a subdirectory can be added
to the build process just by creating a SConscript file in it.
The process has two passes.  On the first pass, all subdirs
of the root of the tree are searched for SConsopts files.
These files contain any command line options that ought to be
added for a particular subdirectory.  On the second pass,
all subdirs of the src directory are searched for SConscript
files.  These files describe how to build any given subdirectory.
I have added a Source() function.  Any file (relative to the
directory in which the SConscript resides) passed to that
function is added to the build.  Clean up everything to take
advantage of Source().
function is added to the list of files to be built.

--HG--
extra : convert_revision : 103f6b490d2eb224436688c89cdc015211c4fd30
 2007-03-10 23:00:54 -08:00
Gabe Black
52ec0fe3d9 Merge zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace 
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace-test

--HG--
extra : convert_revision : dc02bb6b4e5cc7f0260da80a71b9713f75566a29
 2007-03-10 20:52:55 -05:00
Gabe Black
7e363e14f7 Fix bounds check for the cwp 
--HG--
extra : convert_revision : 097e6b0c80d71417329b2a4cd118046aa5ed777a
 2007-03-10 19:29:31 -05:00
Gabe Black
91e8729c28 Added implementations of the fpop2 instructions. 
--HG--
extra : convert_revision : 1fc88b499334bb4ba44375347d0062843587b6cf
 2007-03-10 19:26:54 -05:00
Gabe Black
df1ea2cf05 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace

--HG--
extra : convert_revision : 82a956ffc1bedb2c0d05c4ea3469f843f559a475
 2007-03-09 18:32:13 -05:00
Gabe Black
03ff1c3167 Split the syscall table, SPARC specific syscall implementations, and the 32 bit syscall table into it's own file. Corrected problems with the stat structure. These should be tested on 64 bit x86 and SPARC machines. 
--HG--
extra : convert_revision : 5d9fe19e031b92e111069c6b89c3dbeb29975b8a
 2007-03-09 17:14:24 -05:00
Ali Saidi
58f69391ca implement ipi stufff for SPARC 
src/arch/alpha/utility.hh:
src/arch/mips/utility.hh:
src/arch/sparc/utility.hh:
src/arch/x86/utility.hh:
    add hook for system to startup the cpu or not... in the case of FS sparc, only the first cpu would get spunup.. the rest sit in an idle state until they get an ipi
src/arch/sparc/isa/decoder.isa:
    handle writable bits of strandstatus register in miscregfile
src/arch/sparc/miscregfile.hh:
    some constants for the strand status register
src/arch/sparc/ua2005.cc:
    properly implement the strand status register
src/dev/sparc/iob.cc:
    implement ipi generation properly
src/sim/system.cc:
    call into the ISA to start the CPU (or not)

--HG--
extra : convert_revision : 0003b2032337d8a031a9fc044da726dbb2a9e36f
 2007-03-09 16:56:39 -05:00
Ali Saidi
1158da37fb Panic if any CMT registers are accessed 
src/arch/sparc/asi.cc:
src/arch/sparc/asi.hh:
    add CMT ASI registers
src/arch/sparc/tlb.cc:
    Panic if any of the CMT registers are being accessed

--HG--
extra : convert_revision : b9a94281e2074a576ac21d042b756950d509e758
 2007-03-08 21:49:13 -05:00
Gabe Black
c40d95e4c4 Fixed an off-by-one error. 
--HG--
extra : convert_revision : 498fef18cf339cabc2c00e4758bc8a0da857daca
 2007-03-08 00:55:16 -05:00