ARM: Improve printing of uop disassembly.
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d2fac84b95
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@ -215,4 +215,31 @@ MacroVFPMemOp::MacroVFPMemOp(const char *mnem, ExtMachInst machInst,
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}
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}
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}
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}
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std::string
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MicroIntOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
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{
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std::stringstream ss;
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printMnemonic(ss);
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printReg(ss, ura);
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ss << ", ";
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printReg(ss, urb);
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ss << ", ";
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ccprintf(ss, "#%d", imm);
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return ss.str();
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}
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std::string
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MicroMemOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
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{
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std::stringstream ss;
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printMnemonic(ss);
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printReg(ss, ura);
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ss << ", [";
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printReg(ss, urb);
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ss << ", ";
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ccprintf(ss, "#%d", imm);
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ss << "]";
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return ss.str();
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}
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}
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}
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@ -94,6 +94,8 @@ class MicroIntOp : public MicroOp
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ura(_ura), urb(_urb), imm(_imm)
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ura(_ura), urb(_urb), imm(_imm)
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{
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{
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}
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}
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std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
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};
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};
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/**
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/**
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@ -111,6 +113,8 @@ class MicroMemOp : public MicroIntOp
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up(_up), memAccessFlags(TLB::MustBeOne | TLB::AlignWord)
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up(_up), memAccessFlags(TLB::MustBeOne | TLB::AlignWord)
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{
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{
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}
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}
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std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
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};
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};
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/**
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/**
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@ -1162,7 +1162,8 @@ DefaultFetch<Impl>::fetch(bool &status_change)
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#if TRACING_ON
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#if TRACING_ON
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instruction->traceData =
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instruction->traceData =
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cpu->getTracer()->getInstRecord(curTick, cpu->tcBase(tid),
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cpu->getTracer()->getInstRecord(curTick, cpu->tcBase(tid),
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instruction->staticInst, instruction->readPC());
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instruction->staticInst, instruction->readPC(),
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macroop, instruction->readMicroPC());
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#else
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#else
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instruction->traceData = NULL;
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instruction->traceData = NULL;
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#endif
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#endif
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