diff --git a/src/arch/arm/insts/macromem.cc b/src/arch/arm/insts/macromem.cc index e47f4c21c..2a2412912 100644 --- a/src/arch/arm/insts/macromem.cc +++ b/src/arch/arm/insts/macromem.cc @@ -215,4 +215,31 @@ MacroVFPMemOp::MacroVFPMemOp(const char *mnem, ExtMachInst machInst, } } +std::string +MicroIntOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const +{ + std::stringstream ss; + printMnemonic(ss); + printReg(ss, ura); + ss << ", "; + printReg(ss, urb); + ss << ", "; + ccprintf(ss, "#%d", imm); + return ss.str(); +} + +std::string +MicroMemOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const +{ + std::stringstream ss; + printMnemonic(ss); + printReg(ss, ura); + ss << ", ["; + printReg(ss, urb); + ss << ", "; + ccprintf(ss, "#%d", imm); + ss << "]"; + return ss.str(); +} + } diff --git a/src/arch/arm/insts/macromem.hh b/src/arch/arm/insts/macromem.hh index f2d4f9276..003f5a3fd 100644 --- a/src/arch/arm/insts/macromem.hh +++ b/src/arch/arm/insts/macromem.hh @@ -94,6 +94,8 @@ class MicroIntOp : public MicroOp ura(_ura), urb(_urb), imm(_imm) { } + + std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; }; /** @@ -111,6 +113,8 @@ class MicroMemOp : public MicroIntOp up(_up), memAccessFlags(TLB::MustBeOne | TLB::AlignWord) { } + + std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; }; /** diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh index e6815ef8a..59149c8c3 100644 --- a/src/cpu/o3/fetch_impl.hh +++ b/src/cpu/o3/fetch_impl.hh @@ -1162,7 +1162,8 @@ DefaultFetch::fetch(bool &status_change) #if TRACING_ON instruction->traceData = cpu->getTracer()->getInstRecord(curTick, cpu->tcBase(tid), - instruction->staticInst, instruction->readPC()); + instruction->staticInst, instruction->readPC(), + macroop, instruction->readMicroPC()); #else instruction->traceData = NULL; #endif