X86: Fix a few bugs with the segment register instructions in real mode.
Fix a few instances where the register form of zext was used where zexti was intended. Also get rid of the 64 bit only rip relative addressed version since 64 bit and real mode are mutually exclusive.
This commit is contained in:
parent
8813168b5a
commit
1e70401c08
|
@ -215,7 +215,7 @@ def macroop MOV_P_S {
|
||||||
};
|
};
|
||||||
|
|
||||||
def macroop MOV_REAL_S_R {
|
def macroop MOV_REAL_S_R {
|
||||||
zext t2, regm, 15, dataSize=8
|
zexti t2, regm, 15, dataSize=8
|
||||||
slli t3, t2, 2, dataSize=8
|
slli t3, t2, 2, dataSize=8
|
||||||
wrsel reg, regm
|
wrsel reg, regm
|
||||||
wrbase reg, t3
|
wrbase reg, t3
|
||||||
|
@ -223,19 +223,14 @@ def macroop MOV_REAL_S_R {
|
||||||
|
|
||||||
def macroop MOV_REAL_S_M {
|
def macroop MOV_REAL_S_M {
|
||||||
ld t1, seg, sib, disp, dataSize=2
|
ld t1, seg, sib, disp, dataSize=2
|
||||||
zext t2, t1, 15, dataSize=8
|
zexti t2, t1, 15, dataSize=8
|
||||||
slli t3, t2, 2, dataSize=8
|
slli t3, t2, 2, dataSize=8
|
||||||
wrsel reg, t1
|
wrsel reg, t1
|
||||||
wrbase reg, t3
|
wrbase reg, t3
|
||||||
};
|
};
|
||||||
|
|
||||||
def macroop MOV_REAL_S_P {
|
def macroop MOV_REAL_S_P {
|
||||||
rdip t7
|
panic "RIP relative addressing shouldn't happen in real mode"
|
||||||
ld t1, seg, riprel, disp, dataSize=2
|
|
||||||
zext t2, t1, 15, dataSize=8
|
|
||||||
slli t3, t2, 2, dataSize=8
|
|
||||||
wrsel reg, t1
|
|
||||||
wrbase reg, t3
|
|
||||||
};
|
};
|
||||||
|
|
||||||
def macroop MOV_S_R {
|
def macroop MOV_S_R {
|
||||||
|
|
Loading…
Reference in a new issue